Joseph D. Torres

Array ( [id] => 15219831 [patent_doc_number] => 20190372602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 7/15 AND QUADRATURE PHASE SHIFT KEYING, AND BIT INTERLEAVING METHOD USING SAME [patent_app_type] => utility [patent_app_number] => 16/542035 [patent_app_country] => US [patent_app_date] => 2019-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15903041 [patent_doc_number] => 20200151040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => STORAGE DEVICE THAT USES A HOST MEMORY BUFFER AND A MEMORY MANAGEMENT METHOD INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/539729 [patent_app_country] => US [patent_app_date] => 2019-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5844 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16539729 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15966953 [patent_doc_number] => 20200167228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => METHOD FOR RECOVERING EEPROM OF SLAVE DEVICE BY PLC COMMUNICATION MODULE [patent_app_type] => utility [patent_app_number] => 16/539624 [patent_app_country] => US [patent_app_date] => 2019-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16539624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16744449 [patent_doc_number] => 10969429 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-06 [patent_title] => System and method for debugging in concurrent fault simulation [patent_app_type] => utility [patent_app_number] => 16/538920 [patent_app_country] => US [patent_app_date] => 2019-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6060 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16538920 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16944792 [patent_doc_number] => 11057051 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Fractally enhanced kernel polar coding [patent_app_type] => utility [patent_app_number] => 16/538451 [patent_app_country] => US [patent_app_date] => 2019-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12198 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16538451 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15155729 [patent_doc_number] => 20190356342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => Information Transmission Method, And Decoding Method And Apparatus [patent_app_type] => utility [patent_app_number] => 16/529514 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 210869 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -36 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16529514 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15155711 [patent_doc_number] => 20190356333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => Method And Apparatus For Processing Information, Communications Device, And Communications System [patent_app_type] => utility [patent_app_number] => 16/529438 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16529438 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16615806 [patent_doc_number] => 20210034459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => METHOD AND SYSTEM FOR A PROACTIVE HEALTH CHECK AND RECONSTRUCTION OF DATA [patent_app_type] => utility [patent_app_number] => 16/528602 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528602 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15155715 [patent_doc_number] => 20190356335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => Encoding Method, Communication Method, and Apparatus [patent_app_type] => utility [patent_app_number] => 16/527626 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16527626 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15155721 [patent_doc_number] => 20190356338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 2/15 AND QUADRATURE PHASE SHIFT KEYING, AND BIT INTERLEAVING METHOD USING SAME [patent_app_type] => utility [patent_app_number] => 16/527485 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16527485 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16552839 [patent_doc_number] => 10886004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Sorting non-volatile memories [patent_app_type] => utility [patent_app_number] => 16/520836 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3860 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16520836 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15090507 [patent_doc_number] => 20190340064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => MEMORY-BASED DISTRIBUTED PROCESSOR ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 16/512613 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16512613 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16706134 [patent_doc_number] => 10956065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Solid state storage device with quick boot from NAND media [patent_app_type] => utility [patent_app_number] => 16/512256 [patent_app_country] => US [patent_app_date] => 2019-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4107 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16512256 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15047093 [patent_doc_number] => 20190334551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => MODULATOR AND MODULATION METHOD USING NON-UNIFORM 16-SYMBOL SIGNAL CONSTELLATION FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING 3/15 CODE RATE [patent_app_type] => utility [patent_app_number] => 16/506486 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8065 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506486 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16565254 [patent_doc_number] => 10890619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Sequential test access port selection in a JTAG interface [patent_app_type] => utility [patent_app_number] => 16/505174 [patent_app_country] => US [patent_app_date] => 2019-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4999 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16505174 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16522116 [patent_doc_number] => 10873343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-22 [patent_title] => Transmitter apparatus and bit interleaving method thereof [patent_app_type] => utility [patent_app_number] => 16/460305 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 40246 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460305 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16669638 [patent_doc_number] => 10938905 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-02 [patent_title] => Handling deletes with distributed erasure coding [patent_app_type] => utility [patent_app_number] => 16/457615 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16457615 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17179420 [patent_doc_number] => 11156658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-26 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/447409 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6960 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16447409 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16432696 [patent_doc_number] => 10832789 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-10 [patent_title] => System countermeasure for read operation during TLC program suspend causing ADL data reset with XDL data [patent_app_type] => utility [patent_app_number] => 16/440018 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 49 [patent_no_of_words] => 16708 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16440018 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16418628 [patent_doc_number] => 10826538 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-03 [patent_title] => Efficient error correction of codewords encoded by binary symmetry-invariant product codes [patent_app_type] => utility [patent_app_number] => 16/439197 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 7795 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439197 [rel_patent_id] =>[rel_patent_doc_number] =>)