Search

Joseph D. Torres

Examiner (ID: 13957, Phone: (571)272-3829 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112, 2133
Total Applications
2134
Issued Applications
1676
Pending Applications
96
Abandoned Applications
378

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13432373 [patent_doc_number] => 20180267729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/977291 [patent_app_country] => US [patent_app_date] => 2018-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15977291 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/977291
Semiconductor device May 10, 2018 Issued
Array ( [id] => 18053011 [patent_doc_number] => 11526396 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Minimum-size belief propagation network for FEC iterative encoders and decoders and related routing method [patent_app_type] => utility [patent_app_number] => 16/612959 [patent_app_country] => US [patent_app_date] => 2018-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 14305 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 735 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16612959 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/612959
Minimum-size belief propagation network for FEC iterative encoders and decoders and related routing method May 10, 2018 Issued
Array ( [id] => 13402457 [patent_doc_number] => 20180252771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-06 [patent_title] => Self Test for Safety Logic [patent_app_type] => utility [patent_app_number] => 15/973257 [patent_app_country] => US [patent_app_date] => 2018-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15973257 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/973257
Self test for safety logic May 6, 2018 Issued
Array ( [id] => 13379747 [patent_doc_number] => 20180241415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => CIRCUITRY AND METHODS FOR CONTINUOUS PARALLEL DECODER OPERATION [patent_app_type] => utility [patent_app_number] => 15/958623 [patent_app_country] => US [patent_app_date] => 2018-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5406 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15958623 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/958623
Circuitry and methods for continuous parallel decoder operation Apr 19, 2018 Issued
Array ( [id] => 16181178 [patent_doc_number] => 20200228147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => DATA TRANSMISSION METHOD, APPARATUS AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 16/627066 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16627066 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/627066
Data transmission method, apparatus and storage medium Apr 3, 2018 Issued
Array ( [id] => 17310823 [patent_doc_number] => 11211951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Method for encoding based on parity check matrix of LDPC code in wireless communication system and terminal using this [patent_app_type] => utility [patent_app_number] => 16/065759 [patent_app_country] => US [patent_app_date] => 2018-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 584 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16065759 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/065759
Method for encoding based on parity check matrix of LDPC code in wireless communication system and terminal using this Mar 29, 2018 Issued
Array ( [id] => 13332717 [patent_doc_number] => 20180217896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 15/935578 [patent_app_country] => US [patent_app_date] => 2018-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10509 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15935578 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/935578
Memory system Mar 25, 2018 Issued
Array ( [id] => 15618487 [patent_doc_number] => 20200079648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => SYNDROME OF DEGRADED QUANTUM REDUNDANCY CODED STATES [patent_app_type] => utility [patent_app_number] => 15/911909 [patent_app_country] => US [patent_app_date] => 2018-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8497 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15911909 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/911909
Syndrome of degraded quantum redundancy coded states Mar 4, 2018 Issued
Array ( [id] => 13403619 [patent_doc_number] => 20180253352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-06 [patent_title] => METHOD AND COMPUTER SYSTEM FOR FAULT TOLERANT DATA INTEGRITY VERIFICATION OF SAFETY-RELATED DATA [patent_app_type] => utility [patent_app_number] => 15/910611 [patent_app_country] => US [patent_app_date] => 2018-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15910611 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/910611
Method and computer system for fault tolerant data integrity verification of safety-related data Mar 1, 2018 Issued
Array ( [id] => 14080991 [patent_doc_number] => 20190089383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 15/909678 [patent_app_country] => US [patent_app_date] => 2018-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9881 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15909678 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/909678
Memory system Feb 28, 2018 Issued
Array ( [id] => 13961297 [patent_doc_number] => 20190056993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-21 [patent_title] => ERROR CORRECTION CIRCUIT, OPERATING METHOD THEREOF AND DATA STORAGE DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/909021 [patent_app_country] => US [patent_app_date] => 2018-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7569 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15909021 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/909021
Error correction circuit, operating method thereof and data storage device including the same Feb 28, 2018 Issued
Array ( [id] => 15761767 [patent_doc_number] => 10623021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Modulator and modulation method using non-uniform 16-symbol signal constellation for low-density parity check codeword having 4/15 code rate [patent_app_type] => utility [patent_app_number] => 15/907064 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7958 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15907064 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/907064
Modulator and modulation method using non-uniform 16-symbol signal constellation for low-density parity check codeword having 4/15 code rate Feb 26, 2018 Issued
Array ( [id] => 14506495 [patent_doc_number] => 20190196902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => DYNAMIC RANDOM ACCESS MEMORY AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/904912 [patent_app_country] => US [patent_app_date] => 2018-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4720 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15904912 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/904912
DYNAMIC RANDOM ACCESS MEMORY AND METHOD OF OPERATING THE SAME Feb 25, 2018 Abandoned
Array ( [id] => 15139015 [patent_doc_number] => 10482989 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-19 [patent_title] => Dynamic diagnostics analysis for memory built-in self-test [patent_app_type] => utility [patent_app_number] => 15/903916 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4664 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903916 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/903916
Dynamic diagnostics analysis for memory built-in self-test Feb 22, 2018 Issued
Array ( [id] => 13453651 [patent_doc_number] => 20180278368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => Preemption Indicators and Code-Block-Group-Based Retransmission Techniques for Multiplexing Different Services on Physical Layer Frames [patent_app_type] => utility [patent_app_number] => 15/903222 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15438 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903222 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/903222
Preemption indicators and code-block-group-based retransmission techniques for multiplexing different services on physical layer frames Feb 22, 2018 Issued
Array ( [id] => 15247113 [patent_doc_number] => 10509074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Electrical testing apparatus for spintronics devices [patent_app_type] => utility [patent_app_number] => 15/902407 [patent_app_country] => US [patent_app_date] => 2018-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 13608 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 350 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15902407 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/902407
Electrical testing apparatus for spintronics devices Feb 21, 2018 Issued
Array ( [id] => 13998333 [patent_doc_number] => 20190068324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => WIRELESS COMMUNICATION APPARATUS AND WIRELESS COMMUNICATION METHOD [patent_app_type] => utility [patent_app_number] => 15/902243 [patent_app_country] => US [patent_app_date] => 2018-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16013 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15902243 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/902243
Wireless communication apparatus and wireless communication method Feb 21, 2018 Issued
Array ( [id] => 15758477 [patent_doc_number] => 10621354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Verifying basic input/output system (BIOS) boot block code [patent_app_type] => utility [patent_app_number] => 15/902250 [patent_app_country] => US [patent_app_date] => 2018-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3294 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15902250 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/902250
Verifying basic input/output system (BIOS) boot block code Feb 21, 2018 Issued
Array ( [id] => 16070405 [patent_doc_number] => 10694176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Image processing apparatus and failure diagnosis control method [patent_app_type] => utility [patent_app_number] => 15/901515 [patent_app_country] => US [patent_app_date] => 2018-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4924 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15901515 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/901515
Image processing apparatus and failure diagnosis control method Feb 20, 2018 Issued
Array ( [id] => 15640835 [patent_doc_number] => 10593420 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Testing content addressable memory and random access memory [patent_app_type] => utility [patent_app_number] => 15/898861 [patent_app_country] => US [patent_app_date] => 2018-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11186 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898861 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/898861
Testing content addressable memory and random access memory Feb 18, 2018 Issued
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