Search

Joseph D. Torres

Examiner (ID: 13957, Phone: (571)272-3829 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112, 2133
Total Applications
2134
Issued Applications
1676
Pending Applications
96
Abandoned Applications
378

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18310144 [patent_doc_number] => 20230114044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => Method of Testing a Stacked Integrated Circuit Device [patent_app_type] => utility [patent_app_number] => 17/934250 [patent_app_country] => US [patent_app_date] => 2022-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934250 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934250
Method of testing a stacked integrated circuit device Sep 21, 2022 Issued
Array ( [id] => 18804863 [patent_doc_number] => 11838033 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-12-05 [patent_title] => Partial speed changes to improve in-order transfer [patent_app_type] => utility [patent_app_number] => 17/949130 [patent_app_country] => US [patent_app_date] => 2022-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5353 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17949130 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/949130
Partial speed changes to improve in-order transfer Sep 19, 2022 Issued
Array ( [id] => 18968120 [patent_doc_number] => 11901912 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-13 [patent_title] => Memory controller and method of accessing flash memory [patent_app_type] => utility [patent_app_number] => 17/933195 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8614 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17933195 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/933195
Memory controller and method of accessing flash memory Sep 18, 2022 Issued
Array ( [id] => 19566706 [patent_doc_number] => 12141478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Memory device, memory module including the memory device, and operating method of memory controller [patent_app_type] => utility [patent_app_number] => 17/932734 [patent_app_country] => US [patent_app_date] => 2022-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8804 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17932734 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/932734
Memory device, memory module including the memory device, and operating method of memory controller Sep 15, 2022 Issued
Array ( [id] => 18849790 [patent_doc_number] => 20230412194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => ENCODER AND FLASH MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 17/945110 [patent_app_country] => US [patent_app_date] => 2022-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17945110 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/945110
Encoder and flash memory controller Sep 14, 2022 Issued
Array ( [id] => 19039100 [patent_doc_number] => 20240088915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => BIT-FLIPPING DECODER AND DECODING METHOD FOR IRREGULAR CODES [patent_app_type] => utility [patent_app_number] => 17/944734 [patent_app_country] => US [patent_app_date] => 2022-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17944734 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/944734
Bit-flipping decoder and decoding method for irregular codes Sep 13, 2022 Issued
Array ( [id] => 19944199 [patent_doc_number] => 12316342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Product autoencoder for error-correcting via sub-stage processing [patent_app_type] => utility [patent_app_number] => 17/942064 [patent_app_country] => US [patent_app_date] => 2022-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4372 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17942064 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/942064
Product autoencoder for error-correcting via sub-stage processing Sep 8, 2022 Issued
Array ( [id] => 19080124 [patent_doc_number] => 11949510 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Hardware-based dynamic cyclic-redundancy check (CRC) generator for automotive application [patent_app_type] => utility [patent_app_number] => 17/929764 [patent_app_country] => US [patent_app_date] => 2022-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 19047 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17929764 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/929764
Hardware-based dynamic cyclic-redundancy check (CRC) generator for automotive application Sep 5, 2022 Issued
Array ( [id] => 18439712 [patent_doc_number] => 20230187007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => CHIP HAVING DEBUG FUNCTION AND CHIP DEBUGGING METHOD [patent_app_type] => utility [patent_app_number] => 17/899006 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7378 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899006 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899006
Chip having debug function and chip debugging method Aug 29, 2022 Issued
Array ( [id] => 19005943 [patent_doc_number] => 20240070014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => COMMANDS FOR TESTING ERROR CORRECTION IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/897053 [patent_app_country] => US [patent_app_date] => 2022-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12532 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17897053 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/897053
Commands for testing error correction in a memory device Aug 25, 2022 Issued
Array ( [id] => 18501143 [patent_doc_number] => 20230223961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => ITERATIVE DECODER FOR CORRECTING DRAM DEVICE FAILURES [patent_app_type] => utility [patent_app_number] => 17/896994 [patent_app_country] => US [patent_app_date] => 2022-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17896994 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/896994
Iterative decoder for correcting dram device failures Aug 25, 2022 Issued
Array ( [id] => 18079363 [patent_doc_number] => 20220404975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => APPARATUS, SYSTEM, AND METHOD OF BYTE ADDRESSABLE AND BLOCK ADDRESSABLE STORAGE AND RETRIEVAL OF DATA TO AND FROM NON-VOLATILE STORAGE MEMORY [patent_app_type] => utility [patent_app_number] => 17/891077 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3994 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891077 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/891077
APPARATUS, SYSTEM, AND METHOD OF BYTE ADDRESSABLE AND BLOCK ADDRESSABLE STORAGE AND RETRIEVAL OF DATA TO AND FROM NON-VOLATILE STORAGE MEMORY Aug 17, 2022 Abandoned
Array ( [id] => 19080050 [patent_doc_number] => 11949436 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Low-density parity-check coding scheme with varying puncturing pattern [patent_app_type] => utility [patent_app_number] => 17/887162 [patent_app_country] => US [patent_app_date] => 2022-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 18534 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17887162 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/887162
Low-density parity-check coding scheme with varying puncturing pattern Aug 11, 2022 Issued
Array ( [id] => 18392782 [patent_doc_number] => 20230161002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => TIME-OF-FLIGHT SENSORS, METHODS, AND NON-TRANSITORY COMPUTER-READABLE MEDIA WITH ERROR CORRECTING CODE [patent_app_type] => utility [patent_app_number] => 17/885863 [patent_app_country] => US [patent_app_date] => 2022-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15701 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17885863 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/885863
TIME-OF-FLIGHT SENSORS, METHODS, AND NON-TRANSITORY COMPUTER-READABLE MEDIA WITH ERROR CORRECTING CODE Aug 10, 2022 Abandoned
Array ( [id] => 18951553 [patent_doc_number] => 11894863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Method and apparatus for generating a decoding position control signal for decoding using polar codes [patent_app_type] => utility [patent_app_number] => 17/884935 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5022 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884935 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884935
Method and apparatus for generating a decoding position control signal for decoding using polar codes Aug 9, 2022 Issued
Array ( [id] => 18875378 [patent_doc_number] => 11863204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Decoder circuit including decoders with respective performance and power levels and decoding respective subsets of codewords of received data [patent_app_type] => utility [patent_app_number] => 17/882136 [patent_app_country] => US [patent_app_date] => 2022-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 7141 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17882136 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/882136
Decoder circuit including decoders with respective performance and power levels and decoding respective subsets of codewords of received data Aug 4, 2022 Issued
Array ( [id] => 19122321 [patent_doc_number] => 11966303 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Memory system failure detection and self recovery of memory dice [patent_app_type] => utility [patent_app_number] => 17/877779 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6275 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877779 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877779
Memory system failure detection and self recovery of memory dice Jul 28, 2022 Issued
Array ( [id] => 18913537 [patent_doc_number] => 11876532 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-01-16 [patent_title] => Method and apparatus for determining bit-error rate in a data channel [patent_app_type] => utility [patent_app_number] => 17/815415 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4556 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815415 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815415
Method and apparatus for determining bit-error rate in a data channel Jul 26, 2022 Issued
Array ( [id] => 18968342 [patent_doc_number] => 11902140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Systems and methods for activating FEC processing per application probe class [patent_app_type] => utility [patent_app_number] => 17/815099 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 9266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815099 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815099
Systems and methods for activating FEC processing per application probe class Jul 25, 2022 Issued
Array ( [id] => 19313595 [patent_doc_number] => 12039412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Method for transmitting information through topological quantum error correction based on multi-space-time transformation [patent_app_type] => utility [patent_app_number] => 17/873280 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3960 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873280 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873280
Method for transmitting information through topological quantum error correction based on multi-space-time transformation Jul 25, 2022 Issued
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