Search

Joseph David Anthony

Examiner (ID: 5461, Phone: (571)272-1117 , Office: P/1761 )

Most Active Art Unit
1761
Art Unit(s)
1764, 1754, 1714, 1796, 2203, 1721, 1208, 1761
Total Applications
2776
Issued Applications
1920
Pending Applications
278
Abandoned Applications
599

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16638041 [patent_doc_number] => 10916556 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-09 [patent_title] => Three-dimensional memory device using a buried source line with a thin semiconductor oxide tunneling layer [patent_app_type] => utility [patent_app_number] => 16/199885 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 19770 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199885 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/199885
Three-dimensional memory device using a buried source line with a thin semiconductor oxide tunneling layer Nov 25, 2018 Issued
Array ( [id] => 15331693 [patent_doc_number] => 20200006176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => CHIP PACKAGE STRUCTURE WITH MOLDING LAYER AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/199535 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7032 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199535 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/199535
Chip package structure with molding layer and method for forming the same Nov 25, 2018 Issued
Array ( [id] => 17788061 [patent_doc_number] => 11411200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Display device having a light-emitting element and a color filter [patent_app_type] => utility [patent_app_number] => 16/199655 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8774 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199655 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/199655
Display device having a light-emitting element and a color filter Nov 25, 2018 Issued
Array ( [id] => 17456274 [patent_doc_number] => 11271141 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Light-emitting device with wavelenght conversion layer having quantum dots [patent_app_type] => utility [patent_app_number] => 16/199755 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 6602 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199755 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/199755
Light-emitting device with wavelenght conversion layer having quantum dots Nov 25, 2018 Issued
Array ( [id] => 16645627 [patent_doc_number] => 10923495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Semiconductor memory device with divided source plate [patent_app_type] => utility [patent_app_number] => 16/199356 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 9368 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199356 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/199356
Semiconductor memory device with divided source plate Nov 25, 2018 Issued
Array ( [id] => 15966079 [patent_doc_number] => 20200166791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => Panel and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/199006 [patent_app_country] => US [patent_app_date] => 2018-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199006 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/199006
Panel and method for manufacturing the same Nov 22, 2018 Abandoned
Array ( [id] => 15808063 [patent_doc_number] => 20200127174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => LIGHT EMITTING DIODE PACKAGE WITH ENHANCED QUANTUM DOT RELIABILITY [patent_app_type] => utility [patent_app_number] => 16/198890 [patent_app_country] => US [patent_app_date] => 2018-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4834 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16198890 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/198890
LIGHT EMITTING DIODE PACKAGE WITH ENHANCED QUANTUM DOT RELIABILITY Nov 22, 2018 Abandoned
Array ( [id] => 17232442 [patent_doc_number] => 20210358999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => MICRO LED DEVICE AND METHOD FOR MANUFACTURING MICRO LED DEVICE [patent_app_type] => utility [patent_app_number] => 17/286700 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17286700 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/286700
MICRO LED DEVICE AND METHOD FOR MANUFACTURING MICRO LED DEVICE Nov 15, 2018 Abandoned
Array ( [id] => 15154471 [patent_doc_number] => 20190355713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => SYSTEM IN PACKAGE STRUCTURE AND ELECTROSTATIC DISCHARGE PROTECTION STRUCTURE THEREOF [patent_app_type] => utility [patent_app_number] => 16/183735 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5316 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16183735 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/183735
System in package structure for perform electrostatic discharge operation and electrostatic discharge protection structure thereof Nov 7, 2018 Issued
Array ( [id] => 18646881 [patent_doc_number] => 11770974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => P active materials for organic photoelectric conversion layers in organic photodiodes [patent_app_type] => utility [patent_app_number] => 16/756745 [patent_app_country] => US [patent_app_date] => 2018-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 11114 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16756745 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/756745
P active materials for organic photoelectric conversion layers in organic photodiodes Oct 21, 2018 Issued
Array ( [id] => 15745767 [patent_doc_number] => 20200111773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => INTEGRATED CIRCUIT (IC) PACKAGE WITH HETROGENOUS IC CHIP INTERPOSER [patent_app_type] => utility [patent_app_number] => 16/155174 [patent_app_country] => US [patent_app_date] => 2018-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16155174 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/155174
INTEGRATED CIRCUIT (IC) PACKAGE WITH HETROGENOUS IC CHIP INTERPOSER Oct 8, 2018 Abandoned
Array ( [id] => 15745243 [patent_doc_number] => 20200111511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => LANDING PAD IN INTERCONNECT AND MEMORY STACKS: STRUCTURE AND FORMATION OF THE SAME [patent_app_type] => utility [patent_app_number] => 16/155447 [patent_app_country] => US [patent_app_date] => 2018-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6033 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16155447 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/155447
Landing pad in interconnect and memory stacks: structure and formation of the same Oct 8, 2018 Issued
Array ( [id] => 14164001 [patent_doc_number] => 20190109103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => Method of Forming a Semiconductor Package and Semiconductor Package [patent_app_type] => utility [patent_app_number] => 16/155060 [patent_app_country] => US [patent_app_date] => 2018-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6955 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16155060 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/155060
Method of Forming a Semiconductor Package and Semiconductor Package Oct 8, 2018 Abandoned
Array ( [id] => 15733307 [patent_doc_number] => 10615087 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Semiconductor wafer with test key structure [patent_app_type] => utility [patent_app_number] => 16/155496 [patent_app_country] => US [patent_app_date] => 2018-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4161 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16155496 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/155496
Semiconductor wafer with test key structure Oct 8, 2018 Issued
Array ( [id] => 15745703 [patent_doc_number] => 20200111741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => VERTICAL ELECTRICAL FUSE [patent_app_type] => utility [patent_app_number] => 16/155477 [patent_app_country] => US [patent_app_date] => 2018-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5032 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16155477 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/155477
VERTICAL ELECTRICAL FUSE Oct 8, 2018 Abandoned
Array ( [id] => 17018451 [patent_doc_number] => 11088096 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Transistor outline housing with high return loss [patent_app_type] => utility [patent_app_number] => 16/154989 [patent_app_country] => US [patent_app_date] => 2018-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4251 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16154989 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/154989
Transistor outline housing with high return loss Oct 8, 2018 Issued
Array ( [id] => 14285615 [patent_doc_number] => 20190140092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 16/155070 [patent_app_country] => US [patent_app_date] => 2018-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6496 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16155070 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/155070
SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME Oct 8, 2018 Abandoned
Array ( [id] => 18433333 [patent_doc_number] => 11678576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Heterocyclic compound and organic light emitting element comprising same [patent_app_type] => utility [patent_app_number] => 16/649290 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 18674 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16649290 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/649290
Heterocyclic compound and organic light emitting element comprising same Sep 27, 2018 Issued
Array ( [id] => 16981896 [patent_doc_number] => 20210226133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => HETEROCYCLIC COMPOUND AND ORGANIC LIGHT EMITTING ELEMENT COMPRISING SAME [patent_app_type] => utility [patent_app_number] => 16/649528 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28746 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 341 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16649528 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/649528
Heterocyclic compound and organic light emitting element comprising same Sep 27, 2018 Issued
Array ( [id] => 17668577 [patent_doc_number] => 11362282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-14 [patent_title] => Heterocyclic compound and organic light emitting element comprising same [patent_app_type] => utility [patent_app_number] => 16/649423 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 27837 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 410 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16649423 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/649423
Heterocyclic compound and organic light emitting element comprising same Sep 27, 2018 Issued
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