Search

Joseph L. Williams

Examiner (ID: 16573, Phone: (571)272-2465 , Office: P/2879 )

Most Active Art Unit
2875
Art Unit(s)
2215, 2889, 2879, 2875
Total Applications
2964
Issued Applications
2537
Pending Applications
186
Abandoned Applications
281

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9577053 [patent_doc_number] => 08767480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Semiconductor memory device and method of operating the same' [patent_app_type] => utility [patent_app_number] => 13/492204 [patent_app_country] => US [patent_app_date] => 2012-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3852 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13492204 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/492204
Semiconductor memory device and method of operating the same Jun 7, 2012 Issued
Array ( [id] => 8521289 [patent_doc_number] => 20120320697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/492174 [patent_app_country] => US [patent_app_date] => 2012-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9594 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13492174 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/492174
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE Jun 7, 2012 Abandoned
Array ( [id] => 8809105 [patent_doc_number] => 08446765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Semiconductor memory device having memory block configuration' [patent_app_type] => utility [patent_app_number] => 13/481540 [patent_app_country] => US [patent_app_date] => 2012-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 11338 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13481540 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/481540
Semiconductor memory device having memory block configuration May 24, 2012 Issued
Array ( [id] => 10839577 [patent_doc_number] => 08867262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-21 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/443511 [patent_app_country] => US [patent_app_date] => 2012-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 8990 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 463 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13443511 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/443511
Semiconductor memory device Apr 9, 2012 Issued
Array ( [id] => 8415833 [patent_doc_number] => 20120243332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-27 [patent_title] => 'Non-Volatile Memory and Method with Power-Saving Read and Program-Verify Operations' [patent_app_type] => utility [patent_app_number] => 13/430155 [patent_app_country] => US [patent_app_date] => 2012-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 16956 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13430155 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/430155
Non-volatile memory and method with power-saving read and program-verify operations Mar 25, 2012 Issued
Array ( [id] => 8300258 [patent_doc_number] => 20120182819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'RECYCLING CHARGES' [patent_app_type] => utility [patent_app_number] => 13/429082 [patent_app_country] => US [patent_app_date] => 2012-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3484 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13429082 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/429082
Recycling charges Mar 22, 2012 Issued
Array ( [id] => 9559623 [patent_doc_number] => 20140177335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'NONCONSECUTIVE SENSING OF MULTILEVEL MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 14/122577 [patent_app_country] => US [patent_app_date] => 2012-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7937 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14122577 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/122577
Nonconsecutive sensing of multilevel memory cells Mar 12, 2012 Issued
Array ( [id] => 8813307 [patent_doc_number] => 20130114352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/404734 [patent_app_country] => US [patent_app_date] => 2012-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5992 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13404734 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/404734
Semiconductor memory device Feb 23, 2012 Issued
Array ( [id] => 9456799 [patent_doc_number] => 08717816 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/404710 [patent_app_country] => US [patent_app_date] => 2012-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4885 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13404710 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/404710
Semiconductor memory device Feb 23, 2012 Issued
Array ( [id] => 9609910 [patent_doc_number] => 08787090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Memory cell operation' [patent_app_type] => utility [patent_app_number] => 13/372669 [patent_app_country] => US [patent_app_date] => 2012-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 14531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13372669 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/372669
Memory cell operation Feb 13, 2012 Issued
Array ( [id] => 8809095 [patent_doc_number] => 08446755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Multiple cycle memory write completion' [patent_app_type] => utility [patent_app_number] => 13/369253 [patent_app_country] => US [patent_app_date] => 2012-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 8999 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13369253 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/369253
Multiple cycle memory write completion Feb 7, 2012 Issued
Array ( [id] => 9010908 [patent_doc_number] => 08526219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-03 [patent_title] => 'Enhanced static random access memory stability using asymmetric access transistors and design structure for same' [patent_app_type] => utility [patent_app_number] => 13/367495 [patent_app_country] => US [patent_app_date] => 2012-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4301 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367495 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/367495
Enhanced static random access memory stability using asymmetric access transistors and design structure for same Feb 6, 2012 Issued
Array ( [id] => 8452040 [patent_doc_number] => 20120262986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-18 [patent_title] => 'SOURCE SIDE ASYMMETRICAL PRECHARGE PROGRAMMING SCHEME' [patent_app_type] => utility [patent_app_number] => 13/365913 [patent_app_country] => US [patent_app_date] => 2012-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11975 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13365913 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/365913
Source side asymmetrical precharge programming scheme Feb 2, 2012 Issued
Array ( [id] => 9531343 [patent_doc_number] => 08755224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'Non-volatile memory device and related read method' [patent_app_type] => utility [patent_app_number] => 13/358534 [patent_app_country] => US [patent_app_date] => 2012-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 24 [patent_no_of_words] => 10935 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13358534 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/358534
Non-volatile memory device and related read method Jan 25, 2012 Issued
Array ( [id] => 9470740 [patent_doc_number] => 08724383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-13 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/358648 [patent_app_country] => US [patent_app_date] => 2012-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5705 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13358648 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/358648
Nonvolatile semiconductor memory device Jan 25, 2012 Issued
Array ( [id] => 11770090 [patent_doc_number] => 09378775 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-28 [patent_title] => 'Semiconductor device including plural chips stacked to each other' [patent_app_type] => utility [patent_app_number] => 13/358448 [patent_app_country] => US [patent_app_date] => 2012-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 30 [patent_no_of_words] => 11894 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13358448 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/358448
Semiconductor device including plural chips stacked to each other Jan 24, 2012 Issued
Array ( [id] => 8201713 [patent_doc_number] => 20120124279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'SYSTEM AND METHOD FOR SETTING ACCESS AND MODIFICATION FOR SYNCHRONOUS SERIAL INTERFACE NAND' [patent_app_type] => utility [patent_app_number] => 13/357533 [patent_app_country] => US [patent_app_date] => 2012-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4773 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20120124279.pdf [firstpage_image] =>[orig_patent_app_number] => 13357533 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/357533
Method for operating a NAND flash memory device in multiple operational modes Jan 23, 2012 Issued
Array ( [id] => 9256059 [patent_doc_number] => 08619487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Semiconductor memory device and method of controlling the same' [patent_app_type] => utility [patent_app_number] => 13/356341 [patent_app_country] => US [patent_app_date] => 2012-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 19409 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13356341 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/356341
Semiconductor memory device and method of controlling the same Jan 22, 2012 Issued
Array ( [id] => 8902786 [patent_doc_number] => 20130170288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'DUAL PORT REGISTER FILE MEMORY CELL WITH REDUCED SUSCEPTIBILITY TO NOISE DURING SAME ROW ACCESS' [patent_app_type] => utility [patent_app_number] => 13/339580 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11555 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13339580 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/339580
Dual port register file memory cell with reduced susceptibility to noise during same row access Dec 28, 2011 Issued
Array ( [id] => 9577052 [patent_doc_number] => 08767479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Semiconductor memory device and driving method thereof' [patent_app_type] => utility [patent_app_number] => 13/339852 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2676 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13339852 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/339852
Semiconductor memory device and driving method thereof Dec 28, 2011 Issued
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