Search

Joseph L. Williams

Examiner (ID: 11155, Phone: (571)272-2465 , Office: P/2879 )

Most Active Art Unit
2875
Art Unit(s)
2879, 2875, 2889, 2215
Total Applications
2945
Issued Applications
2529
Pending Applications
176
Abandoned Applications
281

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15625559 [patent_doc_number] => 20200083184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => Semiconductor Package [patent_app_type] => utility [patent_app_number] => 16/293239 [patent_app_country] => US [patent_app_date] => 2019-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16293239 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/293239
Semiconductor package Mar 4, 2019 Issued
Array ( [id] => 14843225 [patent_doc_number] => 20190280013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => ACTIVE MATRIX SUBSTRATE AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/293303 [patent_app_country] => US [patent_app_date] => 2019-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16293303 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/293303
ACTIVE MATRIX SUBSTRATE AND DISPLAY PANEL Mar 4, 2019 Abandoned
Array ( [id] => 16724070 [patent_doc_number] => 20210091217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => Semiconductor Device and Power Conversion Device [patent_app_type] => utility [patent_app_number] => 16/971547 [patent_app_country] => US [patent_app_date] => 2019-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18866 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 697 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16971547 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/971547
Semiconductor device and power conversion device Jan 31, 2019 Issued
Array ( [id] => 17878738 [patent_doc_number] => 11450763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => IGBT power device and fabrication method therefor [patent_app_type] => utility [patent_app_number] => 16/966071 [patent_app_country] => US [patent_app_date] => 2019-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3980 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16966071 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/966071
IGBT power device and fabrication method therefor Jan 29, 2019 Issued
Array ( [id] => 14985437 [patent_doc_number] => 10446640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Termination implant enrichment for shielded gate MOSFETS [patent_app_type] => utility [patent_app_number] => 16/257866 [patent_app_country] => US [patent_app_date] => 2019-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 10795 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16257866 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/257866
Termination implant enrichment for shielded gate MOSFETS Jan 24, 2019 Issued
Array ( [id] => 14350221 [patent_doc_number] => 20190157083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => FORMING METHOD OF HARD MASK [patent_app_type] => utility [patent_app_number] => 16/253380 [patent_app_country] => US [patent_app_date] => 2019-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8819 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16253380 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/253380
Forming method of hard mask Jan 21, 2019 Issued
Array ( [id] => 14317383 [patent_doc_number] => 20190148395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => COST-EFFECTIVE METHOD TO FORM A RELIABLE MEMORY DEVICE WITH SELECTIVE SILICIDATION AND RESULTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/247159 [patent_app_country] => US [patent_app_date] => 2019-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16247159 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/247159
Memory device with dielectric blocking layer for improving interpoly dielectric breakdown Jan 13, 2019 Issued
Array ( [id] => 14801229 [patent_doc_number] => 10403625 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Heterojunction field effect transistor device with serially connected enhancement mode and depletion mode gate regions [patent_app_type] => utility [patent_app_number] => 16/159483 [patent_app_country] => US [patent_app_date] => 2018-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 8412 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16159483 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/159483
Heterojunction field effect transistor device with serially connected enhancement mode and depletion mode gate regions Oct 11, 2018 Issued
Array ( [id] => 17210857 [patent_doc_number] => 11171236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Cut-fin isolation regions and method forming same [patent_app_type] => utility [patent_app_number] => 16/153026 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 7056 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16153026 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/153026
Cut-fin isolation regions and method forming same Oct 4, 2018 Issued
Array ( [id] => 14938919 [patent_doc_number] => 20190305098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => INTEGRATED CIRCUIT DEVICES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/152956 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9564 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16152956 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/152956
Integrated circuit devices and methods of manufacturing the same Oct 4, 2018 Issued
Array ( [id] => 15746031 [patent_doc_number] => 20200111905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => TRANSISTOR STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/153239 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3503 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16153239 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/153239
Transistor structures Oct 4, 2018 Issued
Array ( [id] => 13909191 [patent_doc_number] => 20190043800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => SEMICONDUCTOR PACKAGE HAVING A VARIABLE REDISTRIBUTION LAYER THICKNESS [patent_app_type] => utility [patent_app_number] => 16/152221 [patent_app_country] => US [patent_app_date] => 2018-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7454 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16152221 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/152221
Semiconductor package having a variable redistribution layer thickness Oct 3, 2018 Issued
Array ( [id] => 17700359 [patent_doc_number] => 11374094 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Silicon carbide diode having high surge current capability and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/623961 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 26 [patent_no_of_words] => 8059 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16623961 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/623961
Silicon carbide diode having high surge current capability and manufacturing method thereof Sep 11, 2018 Issued
Array ( [id] => 17652752 [patent_doc_number] => 11355492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Semiconductor device with chamfered upper portions of work function layer [patent_app_type] => utility [patent_app_number] => 16/117065 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 88 [patent_figures_cnt] => 89 [patent_no_of_words] => 44638 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16117065 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/117065
Semiconductor device with chamfered upper portions of work function layer Aug 29, 2018 Issued
Array ( [id] => 13996933 [patent_doc_number] => 20190067624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => Electroluminescent Display Device [patent_app_type] => utility [patent_app_number] => 16/109691 [patent_app_country] => US [patent_app_date] => 2018-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10256 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16109691 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/109691
Electroluminescent display device Aug 21, 2018 Issued
Array ( [id] => 15532379 [patent_doc_number] => 20200058495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => DIELECTRIC LAYER, INTERCONNECTION STRUCTURE USING THE SAME, AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/103744 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103744 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103744
Dielectric layer, interconnection structure using the same, and manufacturing method thereof Aug 13, 2018 Issued
Array ( [id] => 13963029 [patent_doc_number] => 20190057859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-21 [patent_title] => Methods and Systems for Forming a Mask Layer [patent_app_type] => utility [patent_app_number] => 16/103370 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8333 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103370 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103370
Methods and Systems for Forming a Mask Layer Aug 13, 2018 Abandoned
Array ( [id] => 15532373 [patent_doc_number] => 20200058492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => MODIFICATION OF SNO2 SURFACE FOR EUV LITHOGRAPHY [patent_app_type] => utility [patent_app_number] => 16/103849 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8173 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103849 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103849
Modification of SNO Aug 13, 2018 Issued
Array ( [id] => 16819839 [patent_doc_number] => 11004677 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Method for forming metal oxide layer, and plasma-enhanced chemical vapor deposition device [patent_app_type] => utility [patent_app_number] => 16/103116 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6569 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103116 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103116
Method for forming metal oxide layer, and plasma-enhanced chemical vapor deposition device Aug 13, 2018 Issued
Array ( [id] => 14543021 [patent_doc_number] => 20190207132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => FLEXIBLE ORGANIC LIGHT EMITTING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/101062 [patent_app_country] => US [patent_app_date] => 2018-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16101062 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/101062
Flexible organic light emitting display device Aug 9, 2018 Issued
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