
Joseph Moore Pelham
Examiner (ID: 5754, Phone: (571)272-4786 , Office: P/3742 )
| Most Active Art Unit | 3742 |
| Art Unit(s) | 2106, 3761, 3742 |
| Total Applications | 2549 |
| Issued Applications | 1998 |
| Pending Applications | 99 |
| Abandoned Applications | 463 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17310193
[patent_doc_number] => 11211320
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-28
[patent_title] => Package with shifted lead neck
[patent_app_type] => utility
[patent_app_number] => 16/731748
[patent_app_country] => US
[patent_app_date] => 2019-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 16
[patent_no_of_words] => 6489
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 296
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16731748
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/731748 | Package with shifted lead neck | Dec 30, 2019 | Issued |
Array
(
[id] => 16936524
[patent_doc_number] => 20210202413
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-01
[patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/732071
[patent_app_country] => US
[patent_app_date] => 2019-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5393
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16732071
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/732071 | Semiconductor device package and method of manufacturing the same | Dec 30, 2019 | Issued |
Array
(
[id] => 15873717
[patent_doc_number] => 20200144262
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-07
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/727218
[patent_app_country] => US
[patent_app_date] => 2019-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11803
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -51
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16727218
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/727218 | Semiconductor device and method of manufacturing the same | Dec 25, 2019 | Issued |
Array
(
[id] => 15873513
[patent_doc_number] => 20200144160
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-07
[patent_title] => Semiconductor Device and Method of Manufacture
[patent_app_type] => utility
[patent_app_number] => 16/725732
[patent_app_country] => US
[patent_app_date] => 2019-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6011
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725732
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/725732 | Semiconductor device and method of manufacture | Dec 22, 2019 | Issued |
Array
(
[id] => 16098557
[patent_doc_number] => 20200203265
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-25
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 16/724889
[patent_app_country] => US
[patent_app_date] => 2019-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19853
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724889
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/724889 | Semiconductor package | Dec 22, 2019 | Issued |
Array
(
[id] => 16920518
[patent_doc_number] => 20210193610
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-24
[patent_title] => SEMICONDUCTOR DIE WITH CAPILLARY FLOW STRUCTURES FOR DIRECT CHIP ATTACHMENT
[patent_app_type] => utility
[patent_app_number] => 16/721477
[patent_app_country] => US
[patent_app_date] => 2019-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3682
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16721477
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/721477 | Semiconductor die with capillary flow structures for direct chip attachment | Dec 18, 2019 | Issued |
Array
(
[id] => 16789229
[patent_doc_number] => 10991668
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-04-27
[patent_title] => Connection pad configuration of semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/720876
[patent_app_country] => US
[patent_app_date] => 2019-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5442
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16720876
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/720876 | Connection pad configuration of semiconductor device | Dec 18, 2019 | Issued |
Array
(
[id] => 15807925
[patent_doc_number] => 20200127105
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-23
[patent_title] => METHODS AND STRUCTURES OF NOVEL CONTACT FEATURE
[patent_app_type] => utility
[patent_app_number] => 16/719346
[patent_app_country] => US
[patent_app_date] => 2019-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4549
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16719346
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/719346 | Methods and structures of novel contact feature | Dec 17, 2019 | Issued |
Array
(
[id] => 17224684
[patent_doc_number] => 11177194
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-16
[patent_title] => Semiconductor device with interconnect structure and method for preparing the same
[patent_app_type] => utility
[patent_app_number] => 16/719129
[patent_app_country] => US
[patent_app_date] => 2019-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6427
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16719129
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/719129 | Semiconductor device with interconnect structure and method for preparing the same | Dec 17, 2019 | Issued |
Array
(
[id] => 17332495
[patent_doc_number] => 11222963
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-01-11
[patent_title] => Semiconductor device and method
[patent_app_type] => utility
[patent_app_number] => 16/715712
[patent_app_country] => US
[patent_app_date] => 2019-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 17033
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715712
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/715712 | Semiconductor device and method | Dec 15, 2019 | Issued |
Array
(
[id] => 20244167
[patent_doc_number] => 12424498
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-23
[patent_title] => System and method for modification of substrates
[patent_app_type] => utility
[patent_app_number] => 17/413523
[patent_app_country] => US
[patent_app_date] => 2019-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 12379
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17413523
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/413523 | System and method for modification of substrates | Dec 12, 2019 | Issued |
Array
(
[id] => 15745679
[patent_doc_number] => 20200111729
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-09
[patent_title] => Integrated Circuit Package and Method
[patent_app_type] => utility
[patent_app_number] => 16/707908
[patent_app_country] => US
[patent_app_date] => 2019-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8354
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16707908
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/707908 | Integrated circuit package and method | Dec 8, 2019 | Issued |
Array
(
[id] => 16119931
[patent_doc_number] => 20200211988
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-02
[patent_title] => SEMICONDUCTOR PACKAGE HAVING A SIDEWALL CONNECTION
[patent_app_type] => utility
[patent_app_number] => 16/706594
[patent_app_country] => US
[patent_app_date] => 2019-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12064
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706594
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/706594 | Semiconductor package having a sidewall connection | Dec 5, 2019 | Issued |
Array
(
[id] => 17730914
[patent_doc_number] => 11387316
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-12
[patent_title] => Monolithic back-to-back isolation elements with floating top plate
[patent_app_type] => utility
[patent_app_number] => 16/700370
[patent_app_country] => US
[patent_app_date] => 2019-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7378
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16700370
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/700370 | Monolithic back-to-back isolation elements with floating top plate | Dec 1, 2019 | Issued |
Array
(
[id] => 17048223
[patent_doc_number] => 11101414
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-24
[patent_title] => Method for manufacturing wavelength conversion member, and method for manufacturing light emitting device
[patent_app_type] => utility
[patent_app_number] => 16/699102
[patent_app_country] => US
[patent_app_date] => 2019-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 19
[patent_no_of_words] => 4415
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16699102
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/699102 | Method for manufacturing wavelength conversion member, and method for manufacturing light emitting device | Nov 27, 2019 | Issued |
Array
(
[id] => 16516082
[patent_doc_number] => 20200395340
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-17
[patent_title] => STACK PACKAGES INCLUDING A SUPPORTING SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 16/698436
[patent_app_country] => US
[patent_app_date] => 2019-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9314
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16698436
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/698436 | Stack packages including a supporting substrate | Nov 26, 2019 | Issued |
Array
(
[id] => 17855365
[patent_doc_number] => 20220285408
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-08
[patent_title] => ISOLATION STRUCTURE OF A PHOTORESIST STRIPPER, TFT ARRAYS AND PREPARATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/280098
[patent_app_country] => US
[patent_app_date] => 2019-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3179
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17280098
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/280098 | ISOLATION STRUCTURE OF A PHOTORESIST STRIPPER, TFT ARRAYS AND PREPARATION METHOD THEREOF | Nov 25, 2019 | Abandoned |
Array
(
[id] => 16098503
[patent_doc_number] => 20200203238
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-25
[patent_title] => SEMICONDUCTOR PANELS, SEMICONDUCTOR PACKAGES, AND METHODS FOR MANUFACTURING THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/690963
[patent_app_country] => US
[patent_app_date] => 2019-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7498
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690963
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/690963 | Semiconductor panels, semiconductor packages, and methods for manufacturing thereof | Nov 20, 2019 | Issued |
Array
(
[id] => 16944207
[patent_doc_number] => 11056458
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-06
[patent_title] => Package comprising chip contact element of two different electrically conductive materials
[patent_app_type] => utility
[patent_app_number] => 16/690948
[patent_app_country] => US
[patent_app_date] => 2019-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 18
[patent_no_of_words] => 11957
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690948
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/690948 | Package comprising chip contact element of two different electrically conductive materials | Nov 20, 2019 | Issued |
Array
(
[id] => 17048107
[patent_doc_number] => 11101297
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-24
[patent_title] => Display device
[patent_app_type] => utility
[patent_app_number] => 16/690180
[patent_app_country] => US
[patent_app_date] => 2019-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4992
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690180
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/690180 | Display device | Nov 20, 2019 | Issued |