Search

Joseph O. Schell

Examiner (ID: 8064, Phone: (571)272-8186 , Office: P/2114 )

Most Active Art Unit
2114
Art Unit(s)
2114
Total Applications
912
Issued Applications
785
Pending Applications
40
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16772778 [patent_doc_number] => 10983884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Method and non-volatile memory device for repairing defective strings in units of string selection lines [patent_app_type] => utility [patent_app_number] => 16/110058 [patent_app_country] => US [patent_app_date] => 2018-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7119 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16110058 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/110058
Method and non-volatile memory device for repairing defective strings in units of string selection lines Aug 22, 2018 Issued
Array ( [id] => 15561577 [patent_doc_number] => 20200065200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => COUNTER CIRCUITRY AND METHODS [patent_app_type] => utility [patent_app_number] => 16/109942 [patent_app_country] => US [patent_app_date] => 2018-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16109942 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/109942
Counter circuitry and methods including a master counter providing initialization data and fault detection data and wherein a threshold count difference of a fault detection count is dependent upon the fault detection data Aug 22, 2018 Issued
Array ( [id] => 13627107 [patent_doc_number] => 20180365105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => ESTABLISHING AN OPERATION EXECUTION SCHEDULE IN A DISPERSED STORAGE NETWORK [patent_app_type] => utility [patent_app_number] => 16/108905 [patent_app_country] => US [patent_app_date] => 2018-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7906 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16108905 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/108905
ESTABLISHING AN OPERATION EXECUTION SCHEDULE IN A DISPERSED STORAGE NETWORK Aug 21, 2018 Abandoned
Array ( [id] => 17091661 [patent_doc_number] => 11119851 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Determining when to perform error checking of a storage unit by training a machine learning module [patent_app_type] => utility [patent_app_number] => 16/103545 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 9159 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103545 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103545
Determining when to perform error checking of a storage unit by training a machine learning module Aug 13, 2018 Issued
Array ( [id] => 15440077 [patent_doc_number] => 20200034222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => DETERMINATION OF CAUSE OF ERROR STATE OF ELEMENTS [patent_app_type] => utility [patent_app_number] => 16/048291 [patent_app_country] => US [patent_app_date] => 2018-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16048291 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/048291
Determination of cause of error state of elements in a computing environment based on an element's number of impacted elements and the number in an error state Jul 28, 2018 Issued
Array ( [id] => 16636576 [patent_doc_number] => 10915082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Microcontroller with error signal output circuit and control method of the same [patent_app_type] => utility [patent_app_number] => 16/048282 [patent_app_country] => US [patent_app_date] => 2018-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6265 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16048282 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/048282
Microcontroller with error signal output circuit and control method of the same Jul 28, 2018 Issued
Array ( [id] => 15670565 [patent_doc_number] => 10599512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => System and method for creating and using hybrid virtual computing systems including a reserved portion of a capacity based on cluster failure probability [patent_app_type] => utility [patent_app_number] => 16/045654 [patent_app_country] => US [patent_app_date] => 2018-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 13411 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16045654 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/045654
System and method for creating and using hybrid virtual computing systems including a reserved portion of a capacity based on cluster failure probability Jul 24, 2018 Issued
Array ( [id] => 15412629 [patent_doc_number] => 20200026637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => MULTI-LANGUAGE HEAP ANALYZER [patent_app_type] => utility [patent_app_number] => 16/037933 [patent_app_country] => US [patent_app_date] => 2018-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7591 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16037933 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/037933
Multi-language heap analyzer Jul 16, 2018 Issued
Array ( [id] => 17091660 [patent_doc_number] => 11119850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Determining when to perform error checking of a storage unit by using a machine learning module [patent_app_type] => utility [patent_app_number] => 16/023443 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 9159 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16023443 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/023443
Determining when to perform error checking of a storage unit by using a machine learning module Jun 28, 2018 Issued
Array ( [id] => 15919501 [patent_doc_number] => 10656990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Dynamically adjusting reserve portion and allocation portions of disaster recovery site in a virtual computing system [patent_app_type] => utility [patent_app_number] => 16/006906 [patent_app_country] => US [patent_app_date] => 2018-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 13380 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16006906 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/006906
Dynamically adjusting reserve portion and allocation portions of disaster recovery site in a virtual computing system Jun 12, 2018 Issued
Array ( [id] => 13483201 [patent_doc_number] => 20180293143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => FAILOVER OF A VIRTUAL FUNCTION EXPOSED BY AN SR-IOV ADAPTER [patent_app_type] => utility [patent_app_number] => 16/005032 [patent_app_country] => US [patent_app_date] => 2018-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5616 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16005032 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/005032
Failover of a virtual function exposed by an SR-IOV adapter Jun 10, 2018 Issued
Array ( [id] => 15214829 [patent_doc_number] => 20190370101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => AUTOMATED COGNITIVE PROBLEM MANAGEMENT [patent_app_type] => utility [patent_app_number] => 15/996629 [patent_app_country] => US [patent_app_date] => 2018-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6656 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15996629 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/996629
Automated cognitive multi-component problem management Jun 3, 2018 Issued
Array ( [id] => 15854795 [patent_doc_number] => 10642682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Interactive multi-level failsafe enablement [patent_app_type] => utility [patent_app_number] => 15/988178 [patent_app_country] => US [patent_app_date] => 2018-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3529 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15988178 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/988178
Interactive multi-level failsafe enablement May 23, 2018 Issued
Array ( [id] => 16494404 [patent_doc_number] => 10860446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Failed storage device rebuild using dynamically selected locations in overprovisioned space [patent_app_type] => utility [patent_app_number] => 15/963829 [patent_app_country] => US [patent_app_date] => 2018-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7863 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15963829 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/963829
Failed storage device rebuild using dynamically selected locations in overprovisioned space Apr 25, 2018 Issued
Array ( [id] => 15043037 [patent_doc_number] => 20190332523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => Data-Driven Scheduling of Automated Software Program Test Suites [patent_app_type] => utility [patent_app_number] => 15/963413 [patent_app_country] => US [patent_app_date] => 2018-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4702 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15963413 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/963413
Data-driven scheduling of automated software program test suites Apr 25, 2018 Issued
Array ( [id] => 14840501 [patent_doc_number] => 20190278651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => Methods And Systems For Detecting And Capturing Host System Hang Events [patent_app_type] => utility [patent_app_number] => 15/914644 [patent_app_country] => US [patent_app_date] => 2018-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15914644 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/914644
Methods and systems for detecting and capturing host system hang events Mar 6, 2018 Issued
Array ( [id] => 16248341 [patent_doc_number] => 10747701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Rackmount switch devices for peripheral component interconnect express (PCIe) systems [patent_app_type] => utility [patent_app_number] => 15/914081 [patent_app_country] => US [patent_app_date] => 2018-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6259 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15914081 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/914081
Rackmount switch devices for peripheral component interconnect express (PCIe) systems Mar 6, 2018 Issued
Array ( [id] => 16145661 [patent_doc_number] => 10705901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => System and method to control memory failure handling on double-data rate dual in-line memory modules via suspension of the collection of correctable read errors [patent_app_type] => utility [patent_app_number] => 15/903856 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11520 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903856 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/903856
System and method to control memory failure handling on double-data rate dual in-line memory modules via suspension of the collection of correctable read errors Feb 22, 2018 Issued
Array ( [id] => 14782293 [patent_doc_number] => 20190266044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => FAST RECOVERY FROM FAILURES IN A CHRONOLOGICALLY ORDERED LOG-STRUCTURED KEY-VALUE STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 15/904185 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15904185 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/904185
Fast recovery from failures in a chronologically ordered log-structured key-value storage system Feb 22, 2018 Issued
Array ( [id] => 17846953 [patent_doc_number] => 11436328 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-09-06 [patent_title] => Systems and methods of safeguarding user data [patent_app_type] => utility [patent_app_number] => 15/903248 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11558 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903248 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/903248
Systems and methods of safeguarding user data Feb 22, 2018 Issued
Menu