Search

Joseph O. Schell

Examiner (ID: 8064, Phone: (571)272-8186 , Office: P/2114 )

Most Active Art Unit
2114
Art Unit(s)
2114
Total Applications
912
Issued Applications
785
Pending Applications
40
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5370005 [patent_doc_number] => 20090307564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Point-to-point repair request mechanism for point-to-multipoint transmission systems' [patent_app_type] => utility [patent_app_number] => 12/462775 [patent_app_country] => US [patent_app_date] => 2009-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8015 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0307/20090307564.pdf [firstpage_image] =>[orig_patent_app_number] => 12462775 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/462775
Point-to-point repair request mechanism for point-to-multipoint transmission systems Aug 5, 2009 Abandoned
Array ( [id] => 7680969 [patent_doc_number] => 20100023839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'Memory system and memory error cause specifying method' [patent_app_type] => utility [patent_app_number] => 12/458775 [patent_app_country] => US [patent_app_date] => 2009-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7711 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20100023839.pdf [firstpage_image] =>[orig_patent_app_number] => 12458775 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/458775
Memory system and memory error cause specifying method Jul 21, 2009 Abandoned
Array ( [id] => 5996485 [patent_doc_number] => 20110016372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'Prediction and cancellation of systematic noise sources in non-volatile memory' [patent_app_type] => utility [patent_app_number] => 12/460221 [patent_app_country] => US [patent_app_date] => 2009-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20110016372.pdf [firstpage_image] =>[orig_patent_app_number] => 12460221 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/460221
Prediction and cancellation of systematic noise sources in non-volatile memory Jul 14, 2009 Issued
Array ( [id] => 5486896 [patent_doc_number] => 20090276661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'STORAGE SYSTEM CREATING A RECOVERY REQUEST POINT ENABLING EXECUTION OF A RECOVERY' [patent_app_type] => utility [patent_app_number] => 12/500986 [patent_app_country] => US [patent_app_date] => 2009-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13954 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20090276661.pdf [firstpage_image] =>[orig_patent_app_number] => 12500986 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/500986
Storage system creating a recovery request enabling execution of a recovery and comprising a switch that detects recovery request point events Jul 9, 2009 Issued
Array ( [id] => 6565477 [patent_doc_number] => 20100017682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-21 [patent_title] => 'Error correction code striping' [patent_app_type] => utility [patent_app_number] => 12/459679 [patent_app_country] => US [patent_app_date] => 2009-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2183 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20100017682.pdf [firstpage_image] =>[orig_patent_app_number] => 12459679 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/459679
Error correction code striping Jul 6, 2009 Abandoned
Array ( [id] => 6363787 [patent_doc_number] => 20100332938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'Techniques for LDPC decoding' [patent_app_type] => utility [patent_app_number] => 12/459263 [patent_app_country] => US [patent_app_date] => 2009-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1871 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0332/20100332938.pdf [firstpage_image] =>[orig_patent_app_number] => 12459263 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/459263
Transceiver that serves LDPC codewords for decoding including clock cycle budgeting based on block transmission length Jun 25, 2009 Issued
Array ( [id] => 10137559 [patent_doc_number] => 09170879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-27 [patent_title] => 'Method and apparatus for scrubbing accumulated data errors from a memory system' [patent_app_type] => utility [patent_app_number] => 12/456923 [patent_app_country] => US [patent_app_date] => 2009-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4919 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12456923 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/456923
Method and apparatus for scrubbing accumulated data errors from a memory system Jun 23, 2009 Issued
Array ( [id] => 8678734 [patent_doc_number] => 08386869 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-02-26 [patent_title] => 'Amplitude defect detection and correction in magnetic storage' [patent_app_type] => utility [patent_app_number] => 12/456508 [patent_app_country] => US [patent_app_date] => 2009-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4022 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12456508 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/456508
Amplitude defect detection and correction in magnetic storage Jun 15, 2009 Issued
Array ( [id] => 6263064 [patent_doc_number] => 20100031117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'Method for specifying transport block to codeword mapping and downlink signal transmission method using the same' [patent_app_type] => utility [patent_app_number] => 12/457596 [patent_app_country] => US [patent_app_date] => 2009-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3731 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20100031117.pdf [firstpage_image] =>[orig_patent_app_number] => 12457596 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/457596
Method for specifying transport block to codeword mapping and downlink signal transmission method using the same Jun 15, 2009 Issued
Array ( [id] => 8158345 [patent_doc_number] => 08171343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-01 [patent_title] => 'Techniques for determining models for performing diagnostics' [patent_app_type] => utility [patent_app_number] => 12/485759 [patent_app_country] => US [patent_app_date] => 2009-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 15141 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/171/08171343.pdf [firstpage_image] =>[orig_patent_app_number] => 12485759 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/485759
Techniques for determining models for performing diagnostics Jun 15, 2009 Issued
Array ( [id] => 6396625 [patent_doc_number] => 20100318850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'GENERATION OF A STIMULI BASED ON A TEST TEMPLATE' [patent_app_type] => utility [patent_app_number] => 12/485053 [patent_app_country] => US [patent_app_date] => 2009-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6240 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20100318850.pdf [firstpage_image] =>[orig_patent_app_number] => 12485053 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/485053
Generation of a stimuli based on a test template Jun 15, 2009 Issued
Array ( [id] => 8645731 [patent_doc_number] => 08370730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Soft output viterbi detector with error event output' [patent_app_type] => utility [patent_app_number] => 12/455803 [patent_app_country] => US [patent_app_date] => 2009-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2836 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12455803 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/455803
Soft output viterbi detector with error event output Jun 3, 2009 Issued
Array ( [id] => 9527570 [patent_doc_number] => 08751860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'Object oriented memory in solid state devices' [patent_app_type] => utility [patent_app_number] => 12/477349 [patent_app_country] => US [patent_app_date] => 2009-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 11029 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12477349 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/477349
Object oriented memory in solid state devices Jun 2, 2009 Issued
Array ( [id] => 5467636 [patent_doc_number] => 20090327836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'Decoding method for convolution code and decoding device' [patent_app_type] => utility [patent_app_number] => 12/457036 [patent_app_country] => US [patent_app_date] => 2009-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9419 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20090327836.pdf [firstpage_image] =>[orig_patent_app_number] => 12457036 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/457036
Decoding method for convolution code and decoding device May 28, 2009 Abandoned
Array ( [id] => 10890671 [patent_doc_number] => 08914684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-16 [patent_title] => 'Method and system for throttling log messages for multiple entities' [patent_app_type] => utility [patent_app_number] => 12/472180 [patent_app_country] => US [patent_app_date] => 2009-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4473 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12472180 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/472180
Method and system for throttling log messages for multiple entities May 25, 2009 Issued
Array ( [id] => 6565065 [patent_doc_number] => 20100017650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-21 [patent_title] => 'NON-VOLATILE MEMORY DATA STORAGE SYSTEM WITH RELIABILITY MANAGEMENT' [patent_app_type] => utility [patent_app_number] => 12/471430 [patent_app_country] => US [patent_app_date] => 2009-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6308 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20100017650.pdf [firstpage_image] =>[orig_patent_app_number] => 12471430 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/471430
NON-VOLATILE MEMORY DATA STORAGE SYSTEM WITH RELIABILITY MANAGEMENT May 24, 2009 Abandoned
Array ( [id] => 9089454 [patent_doc_number] => 08560901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Apparatus, method and memory device for error correction by increasing or decreasing a read voltage and analyzing frequency information for a read error pattern' [patent_app_type] => utility [patent_app_number] => 12/453813 [patent_app_country] => US [patent_app_date] => 2009-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6163 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12453813 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/453813
Apparatus, method and memory device for error correction by increasing or decreasing a read voltage and analyzing frequency information for a read error pattern May 21, 2009 Issued
Array ( [id] => 6468709 [patent_doc_number] => 20100284476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-11 [patent_title] => 'COORDINATION OF PACKET AND ACKNOWLEDGMENT RETRANSMISSIONS' [patent_app_type] => utility [patent_app_number] => 12/463460 [patent_app_country] => US [patent_app_date] => 2009-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14900 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20100284476.pdf [firstpage_image] =>[orig_patent_app_number] => 12463460 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/463460
Coordination of packet and acknowledgment retransmissions May 10, 2009 Issued
Array ( [id] => 8366702 [patent_doc_number] => 08255778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-28 [patent_title] => 'Hybrid ARQ transmission method with effective channel matrix and decision statistics resetting' [patent_app_type] => utility [patent_app_number] => 12/435249 [patent_app_country] => US [patent_app_date] => 2009-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7414 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12435249 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/435249
Hybrid ARQ transmission method with effective channel matrix and decision statistics resetting May 3, 2009 Issued
Array ( [id] => 9885990 [patent_doc_number] => 08972775 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Memory device and method of managing memory data error including determining verification voltages and changing threshold voltages based on a corrected error bit' [patent_app_type] => utility [patent_app_number] => 12/453163 [patent_app_country] => US [patent_app_date] => 2009-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10217 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12453163 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/453163
Memory device and method of managing memory data error including determining verification voltages and changing threshold voltages based on a corrected error bit Apr 29, 2009 Issued
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