
Josetta I. Jones
Examiner (ID: 6289)
| Most Active Art Unit | 2812 |
| Art Unit(s) | 2812 |
| Total Applications | 256 |
| Issued Applications | 249 |
| Pending Applications | 6 |
| Abandoned Applications | 1 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4197973
[patent_doc_number] => 06013584
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-01-11
[patent_title] => 'Methods and apparatus for forming HDP-CVD PSG film used for advanced pre-metal dielectric layer applications'
[patent_app_type] => 1
[patent_app_number] => 8/803041
[patent_app_country] => US
[patent_app_date] => 1997-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 8981
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/013/06013584.pdf
[firstpage_image] =>[orig_patent_app_number] => 803041
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/803041 | Methods and apparatus for forming HDP-CVD PSG film used for advanced pre-metal dielectric layer applications | Feb 18, 1997 | Issued |
Array
(
[id] => 4139592
[patent_doc_number] => 06060385
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-09
[patent_title] => 'Method of making an interconnect structure'
[patent_app_type] => 1
[patent_app_number] => 8/801819
[patent_app_country] => US
[patent_app_date] => 1997-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3333
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/060/06060385.pdf
[firstpage_image] =>[orig_patent_app_number] => 801819
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/801819 | Method of making an interconnect structure | Feb 13, 1997 | Issued |
Array
(
[id] => 4125151
[patent_doc_number] => 06127245
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-03
[patent_title] => 'Grinding technique for integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 8/795693
[patent_app_country] => US
[patent_app_date] => 1997-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2920
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/127/06127245.pdf
[firstpage_image] =>[orig_patent_app_number] => 795693
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/795693 | Grinding technique for integrated circuits | Feb 3, 1997 | Issued |
Array
(
[id] => 4090820
[patent_doc_number] => 05966632
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-12
[patent_title] => 'Method of forming borderless metal to contact structure'
[patent_app_type] => 1
[patent_app_number] => 8/785547
[patent_app_country] => US
[patent_app_date] => 1997-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 1529
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/966/05966632.pdf
[firstpage_image] =>[orig_patent_app_number] => 785547
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/785547 | Method of forming borderless metal to contact structure | Jan 20, 1997 | Issued |
Array
(
[id] => 4181562
[patent_doc_number] => 06020256
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-01
[patent_title] => 'Method of integrated circuit fabrication'
[patent_app_type] => 1
[patent_app_number] => 8/769605
[patent_app_country] => US
[patent_app_date] => 1996-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 10
[patent_no_of_words] => 1016
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/020/06020256.pdf
[firstpage_image] =>[orig_patent_app_number] => 769605
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/769605 | Method of integrated circuit fabrication | Dec 17, 1996 | Issued |
Array
(
[id] => 3957038
[patent_doc_number] => 05930610
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-27
[patent_title] => 'Method for manufacturing T-gate'
[patent_app_type] => 1
[patent_app_number] => 8/767971
[patent_app_country] => US
[patent_app_date] => 1996-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 24
[patent_no_of_words] => 2233
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/930/05930610.pdf
[firstpage_image] =>[orig_patent_app_number] => 767971
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/767971 | Method for manufacturing T-gate | Dec 16, 1996 | Issued |
Array
(
[id] => 4142046
[patent_doc_number] => 06030893
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-29
[patent_title] => 'Chemical vapor deposition of tungsten(W-CVD) process for growing low stress and void free interconnect'
[patent_app_type] => 1
[patent_app_number] => 8/760665
[patent_app_country] => US
[patent_app_date] => 1996-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 1635
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/030/06030893.pdf
[firstpage_image] =>[orig_patent_app_number] => 760665
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/760665 | Chemical vapor deposition of tungsten(W-CVD) process for growing low stress and void free interconnect | Dec 8, 1996 | Issued |
Array
(
[id] => 3934787
[patent_doc_number] => 05972743
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-26
[patent_title] => 'Precursor compositions for ion implantation of antimony and ion implantation process utilizing same'
[patent_app_type] => 1
[patent_app_number] => 8/759761
[patent_app_country] => US
[patent_app_date] => 1996-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1768
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/972/05972743.pdf
[firstpage_image] =>[orig_patent_app_number] => 759761
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/759761 | Precursor compositions for ion implantation of antimony and ion implantation process utilizing same | Dec 2, 1996 | Issued |
Array
(
[id] => 3778019
[patent_doc_number] => 05840086
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-24
[patent_title] => 'Method for manufacturing packaged solid electrolytic capacitor'
[patent_app_type] => 1
[patent_app_number] => 8/627608
[patent_app_country] => US
[patent_app_date] => 1996-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3555
[patent_no_of_claims] => 8
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/840/05840086.pdf
[firstpage_image] =>[orig_patent_app_number] => 627608
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/627608 | Method for manufacturing packaged solid electrolytic capacitor | Apr 3, 1996 | Issued |
Array
(
[id] => 3413077
[patent_doc_number] => 05393537
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-02-28
[patent_title] => 'Fish attractant and scent masking composition'
[patent_app_type] => 1
[patent_app_number] => 8/073951
[patent_app_country] => US
[patent_app_date] => 1993-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3780
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/393/05393537.pdf
[firstpage_image] =>[orig_patent_app_number] => 073951
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/073951 | Fish attractant and scent masking composition | Jun 3, 1993 | Issued |