
Joshua A. Lohn
Examiner (ID: 13873)
| Most Active Art Unit | 2114 |
| Art Unit(s) | 2184, 2114, OPIM, OPA |
| Total Applications | 577 |
| Issued Applications | 508 |
| Pending Applications | 7 |
| Abandoned Applications | 66 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9358663
[patent_doc_number] => 08677218
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-18
[patent_title] => 'LDPC decoding with on the fly error recovery'
[patent_app_type] => utility
[patent_app_number] => 12/953348
[patent_app_country] => US
[patent_app_date] => 2010-11-23
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 6555
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12953348
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/953348 | LDPC decoding with on the fly error recovery | Nov 22, 2010 | Issued |
Array
(
[id] => 8214088
[patent_doc_number] => 20120131417
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-24
[patent_title] => 'CLASSIFYING A CRITICALITY OF A SOFT ERROR AND MITIGATING THE SOFT ERROR BASED ON THE CRITICALITY'
[patent_app_type] => utility
[patent_app_number] => 12/950171
[patent_app_country] => US
[patent_app_date] => 2010-11-19
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0131/20120131417.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/950171 | Classifying a criticality of a soft error and mitigating the soft error based on the criticality | Nov 18, 2010 | Issued |
Array
(
[id] => 8214102
[patent_doc_number] => 20120131424
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-24
[patent_title] => 'MEMORY ARRAY WITH REDUNDANT BITS AND MEMORY ELEMENT VOTING CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 12/950944
[patent_app_country] => US
[patent_app_date] => 2010-11-19
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 12950944
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/950944 | Memory array with redundant bits and memory element voting circuits | Nov 18, 2010 | Issued |
Array
(
[id] => 9431040
[patent_doc_number] => 08707125
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-22
[patent_title] => 'Method and apparatus for transmitting and receiving data in a communication system'
[patent_app_type] => utility
[patent_app_number] => 12/949408
[patent_app_country] => US
[patent_app_date] => 2010-11-18
[patent_effective_date] => 0000-00-00
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Array
(
[id] => 8201871
[patent_doc_number] => 20120124421
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[patent_kind] => A1
[patent_issue_date] => 2012-05-17
[patent_title] => 'Error management within a data processing system'
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[patent_app_number] => 12/926436
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[patent_app_date] => 2010-11-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/926436 | Error management within a data processing system | Nov 16, 2010 | Issued |
Array
(
[id] => 6147460
[patent_doc_number] => 20110131460
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[patent_kind] => A1
[patent_issue_date] => 2011-06-02
[patent_title] => 'METHOD FOR REPAIRING IMAGE'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/947075 | METHOD FOR REPAIRING IMAGE | Nov 15, 2010 | Abandoned |
Array
(
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[patent_title] => 'Processor and method of control of processor'
[patent_app_type] => utility
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[patent_app_country] => US
[patent_app_date] => 2010-11-15
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/946278 | Processor and method of control of processor | Nov 14, 2010 | Issued |
Array
(
[id] => 8959095
[patent_doc_number] => 08504889
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[patent_kind] => B2
[patent_issue_date] => 2013-08-06
[patent_title] => 'Sleep clock error recovery scheme'
[patent_app_type] => utility
[patent_app_number] => 12/945067
[patent_app_country] => US
[patent_app_date] => 2010-11-12
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/945067 | Sleep clock error recovery scheme | Nov 11, 2010 | Issued |
Array
(
[id] => 8935730
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[patent_issue_date] => 2013-07-23
[patent_title] => 'Transmitting system and method of transmitting digital broadcast signal in transmitting system'
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Array
(
[id] => 9236011
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[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-12-03
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 12/944156
[patent_app_country] => US
[patent_app_date] => 2010-11-11
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12944156
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/944156 | Semiconductor memory device | Nov 10, 2010 | Issued |
Array
(
[id] => 8189329
[patent_doc_number] => 20120117439
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-10
[patent_title] => 'System and method of decoding LDPC code blocks'
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[patent_app_number] => 12/939638
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/939638 | System and method of decoding LDPC code blocks | Nov 3, 2010 | Issued |
Array
(
[id] => 8176753
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[patent_country] => US
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[patent_issue_date] => 2012-05-03
[patent_title] => 'Error Correction Scheme for Facsimile Over a Packet Switched Network'
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Array
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/862081 | Processor capable of determining ECC errors | Aug 23, 2010 | Issued |