
Joshua E. Rodden
Examiner (ID: 11866)
| Most Active Art Unit | 3649 |
| Art Unit(s) | 3637, 3631, 3649, 3642 |
| Total Applications | 1272 |
| Issued Applications | 718 |
| Pending Applications | 98 |
| Abandoned Applications | 472 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 736001
[patent_doc_number] => 07043588
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-09
[patent_title] => 'Information handling system featuring multi-processor capability with processor located in docking station'
[patent_app_type] => utility
[patent_app_number] => 10/154498
[patent_app_country] => US
[patent_app_date] => 2002-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2921
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/043/07043588.pdf
[firstpage_image] =>[orig_patent_app_number] => 10154498
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/154498 | Information handling system featuring multi-processor capability with processor located in docking station | May 23, 2002 | Issued |
Array
(
[id] => 1027631
[patent_doc_number] => 06886067
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-26
[patent_title] => '32 Bit generic asynchronous bus interface using read/write strobe byte enables'
[patent_app_type] => utility
[patent_app_number] => 10/155103
[patent_app_country] => US
[patent_app_date] => 2002-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 9264
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/886/06886067.pdf
[firstpage_image] =>[orig_patent_app_number] => 10155103
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/155103 | 32 Bit generic asynchronous bus interface using read/write strobe byte enables | May 22, 2002 | Issued |
Array
(
[id] => 940404
[patent_doc_number] => 06973528
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-12-06
[patent_title] => 'Data caching on bridge following disconnect'
[patent_app_type] => utility
[patent_app_number] => 10/153041
[patent_app_country] => US
[patent_app_date] => 2002-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2891
[patent_no_of_claims] => 20
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[pdf_file] => patents/06/973/06973528.pdf
[firstpage_image] =>[orig_patent_app_number] => 10153041
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/153041 | Data caching on bridge following disconnect | May 21, 2002 | Issued |
Array
(
[id] => 7605743
[patent_doc_number] => 07099979
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-29
[patent_title] => 'Single shelf network system capable of providing expansion to a multiple shelf mode'
[patent_app_type] => utility
[patent_app_number] => 10/153119
[patent_app_country] => US
[patent_app_date] => 2002-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2791
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/099/07099979.pdf
[firstpage_image] =>[orig_patent_app_number] => 10153119
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/153119 | Single shelf network system capable of providing expansion to a multiple shelf mode | May 21, 2002 | Issued |
Array
(
[id] => 6766902
[patent_doc_number] => 20030101302
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-29
[patent_title] => 'Multi-port system and method for routing a data element within an interconnection fabric'
[patent_app_type] => new
[patent_app_number] => 10/152656
[patent_app_country] => US
[patent_app_date] => 2002-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[pdf_file] => publications/A1/0101/20030101302.pdf
[firstpage_image] =>[orig_patent_app_number] => 10152656
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/152656 | Multi-port system and method for routing a data element within an interconnection fabric | May 20, 2002 | Issued |
Array
(
[id] => 1030561
[patent_doc_number] => 06883055
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-19
[patent_title] => 'Hot swap method'
[patent_app_type] => utility
[patent_app_number] => 10/150148
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[patent_app_date] => 2002-05-20
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/883/06883055.pdf
[firstpage_image] =>[orig_patent_app_number] => 10150148
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/150148 | Hot swap method | May 19, 2002 | Issued |
Array
(
[id] => 6114807
[patent_doc_number] => 20020174165
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-21
[patent_title] => 'Cluster system, computer and program'
[patent_app_type] => new
[patent_app_number] => 10/145881
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[patent_app_date] => 2002-05-16
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0174/20020174165.pdf
[firstpage_image] =>[orig_patent_app_number] => 10145881
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/145881 | Cluster system, computer and program | May 15, 2002 | Issued |
Array
(
[id] => 6450885
[patent_doc_number] => 20020129186
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-12
[patent_title] => 'Replacement, upgrade and/or addition of hot-pluggable components in a computer system'
[patent_app_type] => new
[patent_app_number] => 10/145553
[patent_app_country] => US
[patent_app_date] => 2002-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => publications/A1/0129/20020129186.pdf
[firstpage_image] =>[orig_patent_app_number] => 10145553
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/145553 | Replacement, upgrade and/or addition of hot-pluggable components in a computer system | May 13, 2002 | Abandoned |
Array
(
[id] => 885523
[patent_doc_number] => 07356633
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-08
[patent_title] => 'Composing on-chip interconnects with configurable interfaces'
[patent_app_type] => utility
[patent_app_number] => 10/138946
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[patent_app_date] => 2002-05-03
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[pdf_file] => patents/07/356/07356633.pdf
[firstpage_image] =>[orig_patent_app_number] => 10138946
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/138946 | Composing on-chip interconnects with configurable interfaces | May 2, 2002 | Issued |
Array
(
[id] => 6726335
[patent_doc_number] => 20030208647
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[patent_issue_date] => 2003-11-06
[patent_title] => 'Method and apparatus for handling locks'
[patent_app_type] => new
[patent_app_number] => 10/139215
[patent_app_country] => US
[patent_app_date] => 2002-05-02
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[pdf_file] => publications/A1/0208/20030208647.pdf
[firstpage_image] =>[orig_patent_app_number] => 10139215
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/139215 | Method and apparatus for handling locks | May 1, 2002 | Issued |
Array
(
[id] => 1085007
[patent_doc_number] => 06834319
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-12-21
[patent_title] => 'Tunnel device for an input/output node of a computer system'
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[patent_app_number] => 10/103369
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[pdf_file] => patents/06/834/06834319.pdf
[firstpage_image] =>[orig_patent_app_number] => 10103369
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/103369 | Tunnel device for an input/output node of a computer system | Mar 20, 2002 | Issued |
Array
(
[id] => 6161457
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[patent_title] => 'Synchronous memory device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/097336 | Synchronous memory device | Mar 13, 2002 | Issued |
Array
(
[id] => 1179295
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[patent_title] => 'Information storage apparatus including an uninterruptible power supply (UPS) and an interlock control method of the same'
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Array
(
[id] => 426788
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[patent_title] => 'Method and apparatus for adjusting a power consumption level based on the amount of time a processor clock is stopped'
[patent_app_type] => reissue
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Array
(
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[patent_title] => 'Method and apparatus embedding PCI-to-PCI bridge functions in PCI devices using PCI configuration header type 0'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/077442 | Method and apparatus embedding PCI-to-PCI bridge functions in PCI devices using PCI configuration header type 0 | Feb 14, 2002 | Issued |
Array
(
[id] => 6020208
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[patent_title] => 'Processor having real-time power conservation'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/074739 | Processor having real-time power conservation | Feb 10, 2002 | Issued |
Array
(
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[patent_title] => 'Low power consumption semiconductor integrated circuit device and microprocessor'
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Array
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/060813 | Multi-drop bus to personal computer interface | Jan 31, 2002 | Abandoned |