Search

Joshua E. Rodden

Examiner (ID: 11866)

Most Active Art Unit
3649
Art Unit(s)
3637, 3631, 3649, 3642
Total Applications
1272
Issued Applications
718
Pending Applications
98
Abandoned Applications
472

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1229108 [patent_doc_number] => 06701406 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-02 [patent_title] => 'PCI and MII compatible home phoneline networking alliance (HPNA) interface device' [patent_app_type] => B1 [patent_app_number] => 09/776339 [patent_app_country] => US [patent_app_date] => 2001-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5054 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/701/06701406.pdf [firstpage_image] =>[orig_patent_app_number] => 09776339 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/776339
PCI and MII compatible home phoneline networking alliance (HPNA) interface device Feb 1, 2001 Issued
Array ( [id] => 6019965 [patent_doc_number] => 20020103952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'Look-up table based USB identification' [patent_app_type] => new [patent_app_number] => 09/773026 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1246 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20020103952.pdf [firstpage_image] =>[orig_patent_app_number] => 09773026 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/773026
Look-up table based USB identification Jan 30, 2001 Issued
Array ( [id] => 1165430 [patent_doc_number] => 06772252 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'System and method for identifying a product for use with a computing device' [patent_app_type] => B1 [patent_app_number] => 09/773684 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 7879 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/772/06772252.pdf [firstpage_image] =>[orig_patent_app_number] => 09773684 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/773684
System and method for identifying a product for use with a computing device Jan 30, 2001 Issued
Array ( [id] => 1184573 [patent_doc_number] => 06748469 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-08 [patent_title] => 'Parallel/serial SCSI with legacy support' [patent_app_type] => B1 [patent_app_number] => 09/774501 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2985 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/748/06748469.pdf [firstpage_image] =>[orig_patent_app_number] => 09774501 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/774501
Parallel/serial SCSI with legacy support Jan 30, 2001 Issued
Array ( [id] => 1149441 [patent_doc_number] => 06782439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-24 [patent_title] => 'Bus system and execution scheduling method for access commands thereof' [patent_app_type] => B2 [patent_app_number] => 09/774009 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3859 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/782/06782439.pdf [firstpage_image] =>[orig_patent_app_number] => 09774009 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/774009
Bus system and execution scheduling method for access commands thereof Jan 30, 2001 Issued
Array ( [id] => 1185754 [patent_doc_number] => 06745270 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Dynamically allocating I2C addresses using self bus switching device' [patent_app_type] => B1 [patent_app_number] => 09/773185 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3238 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/745/06745270.pdf [firstpage_image] =>[orig_patent_app_number] => 09773185 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/773185
Dynamically allocating I2C addresses using self bus switching device Jan 30, 2001 Issued
Array ( [id] => 7633099 [patent_doc_number] => 06658521 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-02 [patent_title] => 'Method and apparatus for address translation on PCI bus over infiniband network' [patent_app_type] => B1 [patent_app_number] => 09/772376 [patent_app_country] => US [patent_app_date] => 2001-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3918 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/658/06658521.pdf [firstpage_image] =>[orig_patent_app_number] => 09772376 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/772376
Method and apparatus for address translation on PCI bus over infiniband network Jan 29, 2001 Issued
Array ( [id] => 1243067 [patent_doc_number] => 06684277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-27 [patent_title] => 'Bus transaction verification method' [patent_app_type] => B2 [patent_app_number] => 09/770584 [patent_app_country] => US [patent_app_date] => 2001-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1878 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/684/06684277.pdf [firstpage_image] =>[orig_patent_app_number] => 09770584 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/770584
Bus transaction verification method Jan 25, 2001 Issued
Array ( [id] => 1438654 [patent_doc_number] => 06356972 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'System and method for concurrently requesting input/output and memory address space while maintaining order of data sent and returned therefrom' [patent_app_type] => B1 [patent_app_number] => 09/765773 [patent_app_country] => US [patent_app_date] => 2001-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8243 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/356/06356972.pdf [firstpage_image] =>[orig_patent_app_number] => 09765773 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/765773
System and method for concurrently requesting input/output and memory address space while maintaining order of data sent and returned therefrom Jan 18, 2001 Issued
Array ( [id] => 7041533 [patent_doc_number] => 20010005892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-28 [patent_title] => 'Real-time power conservation for electronic device having a processor' [patent_app_type] => new-utility [patent_app_number] => 09/756838 [patent_app_country] => US [patent_app_date] => 2001-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7077 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20010005892.pdf [firstpage_image] =>[orig_patent_app_number] => 09756838 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/756838
Real-time power conservation for electronic device having a processor Jan 8, 2001 Issued
Array ( [id] => 1180853 [patent_doc_number] => 06754757 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-22 [patent_title] => 'Full mesh interconnect backplane architecture' [patent_app_type] => B1 [patent_app_number] => 09/746212 [patent_app_country] => US [patent_app_date] => 2000-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1756 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/754/06754757.pdf [firstpage_image] =>[orig_patent_app_number] => 09746212 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/746212
Full mesh interconnect backplane architecture Dec 21, 2000 Issued
Array ( [id] => 1214320 [patent_doc_number] => 06715021 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-30 [patent_title] => 'Out-of-band look-ahead arbitration method and/or architecture' [patent_app_type] => B1 [patent_app_number] => 09/732687 [patent_app_country] => US [patent_app_date] => 2000-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4286 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/715/06715021.pdf [firstpage_image] =>[orig_patent_app_number] => 09732687 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/732687
Out-of-band look-ahead arbitration method and/or architecture Dec 7, 2000 Issued
Array ( [id] => 1185766 [patent_doc_number] => 06745276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Communication method and apparatus' [patent_app_type] => B2 [patent_app_number] => 09/730524 [patent_app_country] => US [patent_app_date] => 2000-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5060 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/745/06745276.pdf [firstpage_image] =>[orig_patent_app_number] => 09730524 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/730524
Communication method and apparatus Dec 4, 2000 Issued
Array ( [id] => 1248818 [patent_doc_number] => 06678783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-13 [patent_title] => 'Inter-device coupler' [patent_app_type] => B2 [patent_app_number] => 09/727917 [patent_app_country] => US [patent_app_date] => 2000-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 64 [patent_no_of_words] => 6283 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/678/06678783.pdf [firstpage_image] =>[orig_patent_app_number] => 09727917 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/727917
Inter-device coupler Nov 30, 2000 Issued
Array ( [id] => 1389520 [patent_doc_number] => RE037980 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2003-02-04 [patent_title] => 'Bus-to-bus bridge in computer system, with fast burst memory range' [patent_app_type] => E1 [patent_app_number] => 09/706883 [patent_app_country] => US [patent_app_date] => 2000-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6800 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/037/RE037980.pdf [firstpage_image] =>[orig_patent_app_number] => 09706883 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/706883
Bus-to-bus bridge in computer system, with fast burst memory range Nov 2, 2000 Issued
Array ( [id] => 1210318 [patent_doc_number] => 06718419 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-06 [patent_title] => 'System and method for extending the number of addressable physical devices on a data bus' [patent_app_type] => B1 [patent_app_number] => 09/702468 [patent_app_country] => US [patent_app_date] => 2000-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 9927 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/718/06718419.pdf [firstpage_image] =>[orig_patent_app_number] => 09702468 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/702468
System and method for extending the number of addressable physical devices on a data bus Oct 30, 2000 Issued
Array ( [id] => 4350666 [patent_doc_number] => 06334164 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-25 [patent_title] => 'Bus system for use with information processing apparatus' [patent_app_type] => 1 [patent_app_number] => 9/690998 [patent_app_country] => US [patent_app_date] => 2000-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 6963 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/334/06334164.pdf [firstpage_image] =>[orig_patent_app_number] => 690998 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/690998
Bus system for use with information processing apparatus Oct 17, 2000 Issued
Array ( [id] => 984591 [patent_doc_number] => 06928505 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-09 [patent_title] => 'USB device controller' [patent_app_type] => utility [patent_app_number] => 09/670954 [patent_app_country] => US [patent_app_date] => 2000-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6672 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/928/06928505.pdf [firstpage_image] =>[orig_patent_app_number] => 09670954 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/670954
USB device controller Sep 25, 2000 Issued
Array ( [id] => 1288935 [patent_doc_number] => 06647454 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-11 [patent_title] => 'Data transfer through a bridge' [patent_app_type] => B1 [patent_app_number] => 09/670009 [patent_app_country] => US [patent_app_date] => 2000-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2709 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/647/06647454.pdf [firstpage_image] =>[orig_patent_app_number] => 09670009 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/670009
Data transfer through a bridge Sep 24, 2000 Issued
Array ( [id] => 4400128 [patent_doc_number] => 06304937 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Method of operation of a memory controller' [patent_app_type] => 1 [patent_app_number] => 9/669295 [patent_app_country] => US [patent_app_date] => 2000-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 15071 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304937.pdf [firstpage_image] =>[orig_patent_app_number] => 669295 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/669295
Method of operation of a memory controller Sep 24, 2000 Issued
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