
Randall Jr.
Examiner (ID: 18350, Phone: JR. KELVIN L )
| Most Active Art Unit | 3651 |
| Art Unit(s) | 3651 |
| Total Applications | 936 |
| Issued Applications | 375 |
| Pending Applications | 91 |
| Abandoned Applications | 489 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19387379
[patent_doc_number] => 20240277249
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-22
[patent_title] => NON-INVASIVE METHOD FOR ANALYZING LIQUID IMPLANTS IN DEEP ANATOMICAL PLANES
[patent_app_type] => utility
[patent_app_number] => 18/654536
[patent_app_country] => US
[patent_app_date] => 2024-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1388
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654536
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/654536 | NON-INVASIVE METHOD FOR ANALYZING LIQUID IMPLANTS IN DEEP ANATOMICAL PLANES | May 2, 2024 | Pending |
Array
(
[id] => 20322444
[patent_doc_number] => 20250334532
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-30
[patent_title] => FIRST HALF ECHO INCLUSION IN NUCLEAR MAGNETIC RESONANCE DATA
[patent_app_type] => utility
[patent_app_number] => 18/645695
[patent_app_country] => US
[patent_app_date] => 2024-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12602
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18645695
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/645695 | FIRST HALF ECHO INCLUSION IN NUCLEAR MAGNETIC RESONANCE DATA | Apr 24, 2024 | Pending |
Array
(
[id] => 20289435
[patent_doc_number] => 20250314678
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-09
[patent_title] => PLANAR CURRENT SENSOR FOR POWER CONVERSION APPLICATIONS
[patent_app_type] => utility
[patent_app_number] => 18/625329
[patent_app_country] => US
[patent_app_date] => 2024-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1206
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18625329
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/625329 | PLANAR CURRENT SENSOR FOR POWER CONVERSION APPLICATIONS | Apr 2, 2024 | Pending |
Array
(
[id] => 20289435
[patent_doc_number] => 20250314678
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-09
[patent_title] => PLANAR CURRENT SENSOR FOR POWER CONVERSION APPLICATIONS
[patent_app_type] => utility
[patent_app_number] => 18/625329
[patent_app_country] => US
[patent_app_date] => 2024-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1206
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18625329
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/625329 | PLANAR CURRENT SENSOR FOR POWER CONVERSION APPLICATIONS | Apr 2, 2024 | Pending |
Array
(
[id] => 19498665
[patent_doc_number] => 20240337683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-10
[patent_title] => Method and System of Developing and Executing Test Program for Verifying DUT
[patent_app_type] => utility
[patent_app_number] => 18/620476
[patent_app_country] => US
[patent_app_date] => 2024-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5359
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18620476
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/620476 | Method and System of Developing and Executing Test Program for Verifying DUT | Mar 27, 2024 | Pending |
Array
(
[id] => 19498665
[patent_doc_number] => 20240337683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-10
[patent_title] => Method and System of Developing and Executing Test Program for Verifying DUT
[patent_app_type] => utility
[patent_app_number] => 18/620476
[patent_app_country] => US
[patent_app_date] => 2024-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5359
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18620476
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/620476 | Method and System of Developing and Executing Test Program for Verifying DUT | Mar 27, 2024 | Pending |
Array
(
[id] => 19498665
[patent_doc_number] => 20240337683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-10
[patent_title] => Method and System of Developing and Executing Test Program for Verifying DUT
[patent_app_type] => utility
[patent_app_number] => 18/620476
[patent_app_country] => US
[patent_app_date] => 2024-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5359
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18620476
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/620476 | Method and System of Developing and Executing Test Program for Verifying DUT | Mar 27, 2024 | Pending |
Array
(
[id] => 19465587
[patent_doc_number] => 20240319257
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => TESTING DEVICE AND METHOD FOR TESTING A HIGH OR MEDIUM-VOLTAGE CABLE
[patent_app_type] => utility
[patent_app_number] => 18/609722
[patent_app_country] => US
[patent_app_date] => 2024-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8354
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 268
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18609722
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/609722 | TESTING DEVICE AND METHOD FOR TESTING A HIGH OR MEDIUM-VOLTAGE CABLE | Mar 18, 2024 | Pending |
Array
(
[id] => 19465587
[patent_doc_number] => 20240319257
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => TESTING DEVICE AND METHOD FOR TESTING A HIGH OR MEDIUM-VOLTAGE CABLE
[patent_app_type] => utility
[patent_app_number] => 18/609722
[patent_app_country] => US
[patent_app_date] => 2024-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8354
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 268
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18609722
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/609722 | TESTING DEVICE AND METHOD FOR TESTING A HIGH OR MEDIUM-VOLTAGE CABLE | Mar 18, 2024 | Pending |
Array
(
[id] => 19465280
[patent_doc_number] => 20240318949
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => METHODS, SYSTEMS, AND DEVICES FOR DETECTING DEFORMATION ON A SURFACE
[patent_app_type] => utility
[patent_app_number] => 18/597283
[patent_app_country] => US
[patent_app_date] => 2024-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13693
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597283
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/597283 | METHODS, SYSTEMS, AND DEVICES FOR DETECTING DEFORMATION ON A SURFACE | Mar 5, 2024 | Pending |
Array
(
[id] => 19465280
[patent_doc_number] => 20240318949
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => METHODS, SYSTEMS, AND DEVICES FOR DETECTING DEFORMATION ON A SURFACE
[patent_app_type] => utility
[patent_app_number] => 18/597283
[patent_app_country] => US
[patent_app_date] => 2024-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13693
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597283
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/597283 | METHODS, SYSTEMS, AND DEVICES FOR DETECTING DEFORMATION ON A SURFACE | Mar 5, 2024 | Pending |
Array
(
[id] => 20101161
[patent_doc_number] => 20250231097
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-17
[patent_title] => SYSTEM FOR DETECTING DEBRIS IN A FLUID
[patent_app_type] => utility
[patent_app_number] => 18/585277
[patent_app_country] => US
[patent_app_date] => 2024-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18585277
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/585277 | SYSTEM FOR DETECTING DEBRIS IN A FLUID | Feb 22, 2024 | Pending |
Array
(
[id] => 19465557
[patent_doc_number] => 20240319227
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => TEST SOCKET
[patent_app_type] => utility
[patent_app_number] => 18/443246
[patent_app_country] => US
[patent_app_date] => 2024-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11399
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -47
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443246
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/443246 | TEST SOCKET | Feb 14, 2024 | Pending |
Array
(
[id] => 20166205
[patent_doc_number] => 20250258252
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-14
[patent_title] => MAGNETORESISTANCE ELEMENT INCLUDING A MULTI-LAYERED FREE LAYER STACK TO TUNE HYSTERESIS AND OUTPUT AMPLITUDE
[patent_app_type] => utility
[patent_app_number] => 18/440322
[patent_app_country] => US
[patent_app_date] => 2024-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18440322
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/440322 | MAGNETORESISTANCE ELEMENT INCLUDING A MULTI-LAYERED FREE LAYER STACK TO TUNE HYSTERESIS AND OUTPUT AMPLITUDE | Feb 12, 2024 | Pending |
Array
(
[id] => 19710545
[patent_doc_number] => 20250020687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-16
[patent_title] => ADAPTIVE CHIP TESTING APPARATUS AND FORMATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/433754
[patent_app_country] => US
[patent_app_date] => 2024-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7708
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18433754
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/433754 | Adaptive chip testing apparatus and formation method thereof | Feb 5, 2024 | Issued |
Array
(
[id] => 19710545
[patent_doc_number] => 20250020687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-16
[patent_title] => ADAPTIVE CHIP TESTING APPARATUS AND FORMATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/433754
[patent_app_country] => US
[patent_app_date] => 2024-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7708
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18433754
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/433754 | Adaptive chip testing apparatus and formation method thereof | Feb 5, 2024 | Issued |
Array
(
[id] => 19710545
[patent_doc_number] => 20250020687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-16
[patent_title] => ADAPTIVE CHIP TESTING APPARATUS AND FORMATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/433754
[patent_app_country] => US
[patent_app_date] => 2024-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7708
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18433754
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/433754 | Adaptive chip testing apparatus and formation method thereof | Feb 5, 2024 | Issued |
Array
(
[id] => 19382331
[patent_doc_number] => 20240272201
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => METHOD OF MANUFACTURING CONTACT PROBE AND CONTACT PROBE
[patent_app_type] => utility
[patent_app_number] => 18/432205
[patent_app_country] => US
[patent_app_date] => 2024-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5939
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18432205
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/432205 | METHOD OF MANUFACTURING CONTACT PROBE AND CONTACT PROBE | Feb 4, 2024 | Pending |
Array
(
[id] => 20151592
[patent_doc_number] => 20250251430
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-07
[patent_title] => INTEGRATED CIRCUIT PIN FOR REFERENCE VOLTAGE AND FAULT COMMUNICATION
[patent_app_type] => utility
[patent_app_number] => 18/430740
[patent_app_country] => US
[patent_app_date] => 2024-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1099
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18430740
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/430740 | INTEGRATED CIRCUIT PIN FOR REFERENCE VOLTAGE AND FAULT COMMUNICATION | Feb 1, 2024 | Pending |
Array
(
[id] => 20101199
[patent_doc_number] => 20250231135
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-17
[patent_title] => SYSTEMS AND METHODS FOR ELECTROLYTE QUALITY INSPECTION AND MONITORING
[patent_app_type] => utility
[patent_app_number] => 18/414734
[patent_app_country] => US
[patent_app_date] => 2024-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2125
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414734
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/414734 | SYSTEMS AND METHODS FOR ELECTROLYTE QUALITY INSPECTION AND MONITORING | Jan 16, 2024 | Pending |