Search

J. R. Tillman

Examiner (ID: 6908)

Most Active Art Unit
3641
Art Unit(s)
3641
Total Applications
1826
Issued Applications
1434
Pending Applications
115
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17389660 [patent_doc_number] => 20220037512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => VERTICAL BIPOLAR TRANSISTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/940750 [patent_app_country] => US [patent_app_date] => 2020-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6645 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16940750 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/940750
Vertical bipolar transistor device Jul 27, 2020 Issued
Array ( [id] => 17638281 [patent_doc_number] => 11349017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Bidirectional electrostatic discharge (ESD) protection device [patent_app_type] => utility [patent_app_number] => 16/909142 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 42 [patent_no_of_words] => 7186 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16909142 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/909142
Bidirectional electrostatic discharge (ESD) protection device Jun 22, 2020 Issued
Array ( [id] => 17218010 [patent_doc_number] => 20210351348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => NON-VOLATILE MEMORY DEVICE AND MANUFACTURING TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 16/866704 [patent_app_country] => US [patent_app_date] => 2020-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8965 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16866704 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/866704
Non-volatile memory device and manufacturing technology May 4, 2020 Issued
Array ( [id] => 16835174 [patent_doc_number] => 11011433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => NMOS and PMOS transistor gates with hafnium oxide layers and lanthanum oxide layers [patent_app_type] => utility [patent_app_number] => 16/853019 [patent_app_country] => US [patent_app_date] => 2020-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 5965 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16853019 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/853019
NMOS and PMOS transistor gates with hafnium oxide layers and lanthanum oxide layers Apr 19, 2020 Issued
Array ( [id] => 16566977 [patent_doc_number] => 10892354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Field plates on two opposed surfaces of double-base bidirectional bipolar transistor: devices, methods, and systems [patent_app_type] => utility [patent_app_number] => 16/773031 [patent_app_country] => US [patent_app_date] => 2020-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4061 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16773031 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/773031
Field plates on two opposed surfaces of double-base bidirectional bipolar transistor: devices, methods, and systems Jan 26, 2020 Issued
Array ( [id] => 17638191 [patent_doc_number] => 11348925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Matching nanowire FET periodic structuire to standard cell periodic structure in integrated circuits [patent_app_type] => utility [patent_app_number] => 16/711018 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3356 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16711018 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/711018
Matching nanowire FET periodic structuire to standard cell periodic structure in integrated circuits Dec 10, 2019 Issued
Array ( [id] => 16210524 [patent_doc_number] => 20200243514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/695385 [patent_app_country] => US [patent_app_date] => 2019-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16695385 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/695385
Semiconductor device and manufacturing method of semiconductor device Nov 25, 2019 Issued
Array ( [id] => 15625273 [patent_doc_number] => 20200083041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => Method for Forming Stacked Nanowire Transistors [patent_app_type] => utility [patent_app_number] => 16/684885 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684885 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/684885
Stacked nanowire transistors Nov 14, 2019 Issued
Array ( [id] => 16120053 [patent_doc_number] => 20200212049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => FUSE ARRAY STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/667104 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4679 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667104 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/667104
Fuse array structure Oct 28, 2019 Issued
Array ( [id] => 15906043 [patent_doc_number] => 20200152542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/667111 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6117 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667111 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/667111
Field-effect transistor with a heat absorber in contact with a surface of the gate electrode on its back side Oct 28, 2019 Issued
Array ( [id] => 15462163 [patent_doc_number] => 20200043906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/654028 [patent_app_country] => US [patent_app_date] => 2019-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16654028 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/654028
DISPLAY DEVICE Oct 15, 2019 Abandoned
Array ( [id] => 16959236 [patent_doc_number] => 11063119 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-13 [patent_title] => Semiconductor structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/601855 [patent_app_country] => US [patent_app_date] => 2019-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 8478 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16601855 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/601855
Semiconductor structure and method for forming the same Oct 14, 2019 Issued
Array ( [id] => 16194167 [patent_doc_number] => 20200235016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR THE FORMING SAME [patent_app_type] => utility [patent_app_number] => 16/601864 [patent_app_country] => US [patent_app_date] => 2019-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16601864 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/601864
Semiconductor structure and method for the forming same Oct 14, 2019 Issued
Array ( [id] => 16487907 [patent_doc_number] => 20200381516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/601847 [patent_app_country] => US [patent_app_date] => 2019-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11750 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16601847 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/601847
Semiconductor structure and method for forming the same Oct 14, 2019 Issued
Array ( [id] => 15532949 [patent_doc_number] => 20200058780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => Field Plates on Two Opposed Surfaces of Double-Base Bidirectional Bipolar Transistor: Devices, Methods, and Systems [patent_app_type] => utility [patent_app_number] => 16/557284 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557284 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557284
Field plates on two opposed surfaces of double-base bidirectional bipolar transistor: devices, methods, and systems Aug 29, 2019 Issued
Array ( [id] => 15274421 [patent_doc_number] => 20190385945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 16/555890 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5022 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16555890 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/555890
Semiconductor integrated circuit device Aug 28, 2019 Issued
Array ( [id] => 16386588 [patent_doc_number] => 10811433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => High-voltage transistor device with thick gate insulation layers [patent_app_type] => utility [patent_app_number] => 16/446906 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5110 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446906 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446906
High-voltage transistor device with thick gate insulation layers Jun 19, 2019 Issued
Array ( [id] => 17438946 [patent_doc_number] => 11264286 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Co-integration of tensile silicon and compressive silicon germanium [patent_app_type] => utility [patent_app_number] => 16/445778 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 4605 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445778 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/445778
Co-integration of tensile silicon and compressive silicon germanium Jun 18, 2019 Issued
Array ( [id] => 14723077 [patent_doc_number] => 20190252602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => ELECTRONIC SYSTEMS AND PROCESSOR-BASED SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/394946 [patent_app_country] => US [patent_app_date] => 2019-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10471 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16394946 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/394946
Electronic systems including magnetic regions Apr 24, 2019 Issued
Array ( [id] => 14843225 [patent_doc_number] => 20190280013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => ACTIVE MATRIX SUBSTRATE AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/293303 [patent_app_country] => US [patent_app_date] => 2019-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16293303 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/293303
ACTIVE MATRIX SUBSTRATE AND DISPLAY PANEL Mar 4, 2019 Abandoned
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