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J. R. Waggle

Examiner (ID: 13143, Phone: JR LARRY E )

Most Active Art Unit
3775
Art Unit(s)
3775, 4185
Total Applications
996
Issued Applications
781
Pending Applications
79
Abandoned Applications
173

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20087133 [patent_doc_number] => 20250217069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => STREAMING MATRIX TRANSPOSER WITH DIAGONAL STORAGE [patent_app_type] => utility [patent_app_number] => 19/001251 [patent_app_country] => US [patent_app_date] => 2024-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7478 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19001251 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/001251
STREAMING MATRIX TRANSPOSER WITH DIAGONAL STORAGE Dec 23, 2024 Pending
Array ( [id] => 19985527 [patent_doc_number] => 20250123749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => DETECTION OF MEMORY ACCESSES [patent_app_type] => utility [patent_app_number] => 19/000448 [patent_app_country] => US [patent_app_date] => 2024-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19000448 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/000448
DETECTION OF MEMORY ACCESSES Dec 22, 2024 Pending
Array ( [id] => 19985546 [patent_doc_number] => 20250123768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => Optimizing Storage System Power Consumption Using Dynamic Plane Selection [patent_app_type] => utility [patent_app_number] => 18/987445 [patent_app_country] => US [patent_app_date] => 2024-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18987445 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/987445
Optimizing Storage System Power Consumption Using Dynamic Plane Selection Dec 18, 2024 Pending
Array ( [id] => 20234405 [patent_doc_number] => 20250291724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => COMMUNICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 18/982791 [patent_app_country] => US [patent_app_date] => 2024-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23027 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18982791 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/982791
COMMUNICATION SYSTEM Dec 15, 2024 Pending
Array ( [id] => 20061483 [patent_doc_number] => 20250199705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => MEMORY ARCHITECTURE FOR BLOCK MIGRATION IN ZNS [patent_app_type] => utility [patent_app_number] => 18/980680 [patent_app_country] => US [patent_app_date] => 2024-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5072 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18980680 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/980680
MEMORY ARCHITECTURE FOR BLOCK MIGRATION IN ZNS Dec 12, 2024 Pending
Array ( [id] => 20249642 [patent_doc_number] => 20250298511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => MEMORY STATUS BASED TRAFFIC ROUTING ON HETEROGENEOUS MEMORY SUBSYSTEM [patent_app_type] => utility [patent_app_number] => 18/956020 [patent_app_country] => US [patent_app_date] => 2024-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5249 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18956020 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/956020
MEMORY STATUS BASED TRAFFIC ROUTING ON HETEROGENEOUS MEMORY SUBSYSTEM Nov 21, 2024 Pending
Array ( [id] => 19818869 [patent_doc_number] => 20250077076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => NON-DETERMINISTIC MEMORY PROTOCOL [patent_app_type] => utility [patent_app_number] => 18/954809 [patent_app_country] => US [patent_app_date] => 2024-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18954809 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/954809
NON-DETERMINISTIC MEMORY PROTOCOL Nov 20, 2024 Pending
Array ( [id] => 20026967 [patent_doc_number] => 20250165189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => BIT STRING ARBITER COMPONENTS [patent_app_type] => utility [patent_app_number] => 18/948878 [patent_app_country] => US [patent_app_date] => 2024-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3858 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18948878 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/948878
BIT STRING ARBITER COMPONENTS Nov 14, 2024 Pending
Array ( [id] => 19772085 [patent_doc_number] => 20250053511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => SYSTEM AND METHOD FOR SHARING A CACHE LINE BETWEEN NON-CONTIGUOUS MEMORY AREAS [patent_app_type] => utility [patent_app_number] => 18/928244 [patent_app_country] => US [patent_app_date] => 2024-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18928244 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/928244
SYSTEM AND METHOD FOR SHARING A CACHE LINE BETWEEN NON-CONTIGUOUS MEMORY AREAS Oct 27, 2024 Pending
Array ( [id] => 19725800 [patent_doc_number] => 20250028551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => GLOBAL COHERENCE OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/908970 [patent_app_country] => US [patent_app_date] => 2024-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17707 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18908970 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/908970
GLOBAL COHERENCE OPERATIONS Oct 7, 2024 Pending
Array ( [id] => 19694739 [patent_doc_number] => 20250013284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => STATIC POWER REDUCTION IN CACHES USING DETERMINISTIC NAPS [patent_app_type] => utility [patent_app_number] => 18/894180 [patent_app_country] => US [patent_app_date] => 2024-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4640 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18894180 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/894180
STATIC POWER REDUCTION IN CACHES USING DETERMINISTIC NAPS Sep 23, 2024 Pending
Array ( [id] => 19695017 [patent_doc_number] => 20250013562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => SYNCHRONIZED REQUEST HANDLING AT A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/887886 [patent_app_country] => US [patent_app_date] => 2024-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18887886 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/887886
SYNCHRONIZED REQUEST HANDLING AT A MEMORY DEVICE Sep 16, 2024 Pending
Array ( [id] => 19818915 [patent_doc_number] => 20250077122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => FILE SYSTEM IMPROVEMENTS FOR ZONED STORAGE DEVICE OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/829981 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10268 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829981 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/829981
File system improvements for zoned storage device operations Sep 9, 2024 Issued
Array ( [id] => 20035053 [patent_doc_number] => 20250173275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => STORAGE CONTROLLER, STORAGE DEVICE, AND STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 18/827162 [patent_app_country] => US [patent_app_date] => 2024-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9261 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18827162 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/827162
STORAGE CONTROLLER, STORAGE DEVICE, AND STORAGE SYSTEM Sep 5, 2024 Pending
Array ( [id] => 19645064 [patent_doc_number] => 20240419584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => USAGE DRIVEN MEMORY MAPPING [patent_app_type] => utility [patent_app_number] => 18/814148 [patent_app_country] => US [patent_app_date] => 2024-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9055 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18814148 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/814148
USAGE DRIVEN MEMORY MAPPING Aug 22, 2024 Pending
Array ( [id] => 19633114 [patent_doc_number] => 20240411563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => METHODS AND APPARATUS TO BOOT FROM BLOCK DEVICES [patent_app_type] => utility [patent_app_number] => 18/809646 [patent_app_country] => US [patent_app_date] => 2024-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19707 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18809646 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/809646
METHODS AND APPARATUS TO BOOT FROM BLOCK DEVICES Aug 19, 2024 Pending
Array ( [id] => 19695031 [patent_doc_number] => 20250013576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => System Control Using Sparse Data [patent_app_type] => utility [patent_app_number] => 18/777905 [patent_app_country] => US [patent_app_date] => 2024-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18777905 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/777905
System Control Using Sparse Data Jul 18, 2024 Pending
Array ( [id] => 19819201 [patent_doc_number] => 20250077408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => STORAGE CONTROLLER, STORAGE DEVICE, AND HOST-STORAGE SYSTEM INCLUDING THE STORAGE CONTROLLER [patent_app_type] => utility [patent_app_number] => 18/774153 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18774153 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/774153
STORAGE CONTROLLER, STORAGE DEVICE, AND HOST-STORAGE SYSTEM INCLUDING THE STORAGE CONTROLLER Jul 15, 2024 Pending
Array ( [id] => 20249878 [patent_doc_number] => 20250298747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => Profile Guided Memory Trimming [patent_app_type] => utility [patent_app_number] => 18/769631 [patent_app_country] => US [patent_app_date] => 2024-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18769631 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/769631
Profile Guided Memory Trimming Jul 10, 2024 Pending
Array ( [id] => 19695033 [patent_doc_number] => 20250013578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => MEMORY MANAGEMENT METHOD BASED ON VIRTUAL MEMORY AND APPARATUS USING THE SAME [patent_app_type] => utility [patent_app_number] => 18/763105 [patent_app_country] => US [patent_app_date] => 2024-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18763105 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/763105
MEMORY MANAGEMENT METHOD BASED ON VIRTUAL MEMORY AND APPARATUS USING THE SAME Jul 2, 2024 Pending
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