Juan C. Barrera

Array ( [id] => 734128 [patent_doc_number] => 07038267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Non-volatile memory cell and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/709372 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4355 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/038/07038267.pdf [firstpage_image] =>[orig_patent_app_number] => 10709372 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 733978 [patent_doc_number] => 07038231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Non-planarized, self-aligned, non-volatile phase-change memory array and method of formation' [patent_app_type] => utility [patent_app_number] => 10/835814 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 4479 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/038/07038231.pdf [firstpage_image] =>[orig_patent_app_number] => 10835814 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 739006 [patent_doc_number] => 07034396 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-25 [patent_title] => 'Structure of semiconductor element and its manufacturing process' [patent_app_type] => utility [patent_app_number] => 10/834070 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 3061 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/034/07034396.pdf [firstpage_image] =>[orig_patent_app_number] => 10834070 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 935625 [patent_doc_number] => 06974975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Solid-state imaging device, method for driving solid-state imaging device, and method for processing image signal' [patent_app_type] => utility [patent_app_number] => 10/834250 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 9480 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/974/06974975.pdf [firstpage_image] =>[orig_patent_app_number] => 10834250 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7030875 [patent_doc_number] => 20050029568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Vertical semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/834110 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4618 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20050029568.pdf [firstpage_image] =>[orig_patent_app_number] => 10834110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7174403 [patent_doc_number] => 20040201105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-14 [patent_title] => 'Wiring board and method for producing same' [patent_app_type] => new [patent_app_number] => 10/833790 [patent_app_country] => US [patent_app_date] => 2004-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6420 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20040201105.pdf [firstpage_image] =>[orig_patent_app_number] => 10833790 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 935652 [patent_doc_number] => 06975002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'SOI single crystalline chip structure' [patent_app_type] => utility [patent_app_number] => 10/832290 [patent_app_country] => US [patent_app_date] => 2004-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3208 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975002.pdf [firstpage_image] =>[orig_patent_app_number] => 10832290 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6969635 [patent_doc_number] => 20050035345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Semiconductor device with high-k gate dielectric' [patent_app_type] => utility [patent_app_number] => 10/832020 [patent_app_country] => US [patent_app_date] => 2004-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9995 [patent_no_of_claims] => 71 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20050035345.pdf [firstpage_image] =>[orig_patent_app_number] => 10832020 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7291719 [patent_doc_number] => 20040211995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => 'Magnetic random access memory including middle oxide layer and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/830119 [patent_app_country] => US [patent_app_date] => 2004-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6419 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20040211995.pdf [firstpage_image] =>[orig_patent_app_number] => 10830119 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6923431 [patent_doc_number] => 20050236686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Photo induced-EMF sensor shield' [patent_app_type] => utility [patent_app_number] => 10/830540 [patent_app_country] => US [patent_app_date] => 2004-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6003 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20050236686.pdf [firstpage_image] =>[orig_patent_app_number] => 10830540 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6923448 [patent_doc_number] => 20050236703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Systems and methods for testing packaged dies' [patent_app_type] => utility [patent_app_number] => 10/830910 [patent_app_country] => US [patent_app_date] => 2004-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4614 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20050236703.pdf [firstpage_image] =>[orig_patent_app_number] => 10830910 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 790853 [patent_doc_number] => 06984877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-10 [patent_title] => 'Bumped chip carrier package using lead frame and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/830939 [patent_app_country] => US [patent_app_date] => 2004-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 2759 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/984/06984877.pdf [firstpage_image] =>[orig_patent_app_number] => 10830939 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1068695 [patent_doc_number] => 06844221 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-18 [patent_title] => 'Method of manufacturing a wire bond-less electronic component for use with an external circuit' [patent_app_type] => utility [patent_app_number] => 10/821749 [patent_app_country] => US [patent_app_date] => 2004-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4034 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/844/06844221.pdf [firstpage_image] =>[orig_patent_app_number] => 10821749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7173983 [patent_doc_number] => 20040201032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-14 [patent_title] => 'Visible light transmitting structure with photovoltaic effect' [patent_app_type] => new [patent_app_number] => 10/817797 [patent_app_country] => US [patent_app_date] => 2004-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1434 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20040201032.pdf [firstpage_image] =>[orig_patent_app_number] => 10817797 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7235686 [patent_doc_number] => 20050139864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Multi-layer substrate structure for reducing layout area' [patent_app_type] => utility [patent_app_number] => 10/815860 [patent_app_country] => US [patent_app_date] => 2004-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3168 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20050139864.pdf [firstpage_image] =>[orig_patent_app_number] => 10815860 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7375366 [patent_doc_number] => 20040178440 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Semiconductor device and process for producing the same' [patent_app_type] => new [patent_app_number] => 10/812995 [patent_app_country] => US [patent_app_date] => 2004-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4625 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20040178440.pdf [firstpage_image] =>[orig_patent_app_number] => 10812995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7362985 [patent_doc_number] => 20040217387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Methods for manufacturing semiconductor devices' [patent_app_type] => new [patent_app_number] => 10/812590 [patent_app_country] => US [patent_app_date] => 2004-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1828 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20040217387.pdf [firstpage_image] =>[orig_patent_app_number] => 10812590 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1031533 [patent_doc_number] => 06879045 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-12 [patent_title] => 'Integrated circuit with modified metal features and method of fabrication therefor' [patent_app_type] => utility [patent_app_number] => 10/809651 [patent_app_country] => US [patent_app_date] => 2004-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 11429 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/879/06879045.pdf [firstpage_image] =>[orig_patent_app_number] => 10809651 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7334136 [patent_doc_number] => 20040188783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Micromechanical device and method of manufacture thereof' [patent_app_type] => new [patent_app_number] => 10/806405 [patent_app_country] => US [patent_app_date] => 2004-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6351 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20040188783.pdf [firstpage_image] =>[orig_patent_app_number] => 10806405 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7619790 [patent_doc_number] => 06943395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-13 [patent_title] => 'Phase random access memory with high density' [patent_app_type] => utility [patent_app_number] => 10/805696 [patent_app_country] => US [patent_app_date] => 2004-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 6254 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/943/06943395.pdf [firstpage_image] =>[orig_patent_app_number] => 10805696 [rel_patent_id] =>[rel_patent_doc_number] =>)