Search

Juan Carlos Ochoa

Examiner (ID: 13650, Phone: (571)272-2625 , Office: P/2123 )

Most Active Art Unit
2123
Art Unit(s)
2123, 2186, 2146, 2187, 2127
Total Applications
672
Issued Applications
410
Pending Applications
75
Abandoned Applications
195

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9142925 [patent_doc_number] => 08583406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'Visual simulator for spectacle lens, visual simulation method for spectacle lens, and computer readable recording medium recording computer readable visual simulation program for spectacle lens' [patent_app_type] => utility [patent_app_number] => 12/613205 [patent_app_country] => US [patent_app_date] => 2009-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6807 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12613205 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/613205
Visual simulator for spectacle lens, visual simulation method for spectacle lens, and computer readable recording medium recording computer readable visual simulation program for spectacle lens Nov 4, 2009 Issued
Array ( [id] => 9694824 [patent_doc_number] => 08825450 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-02 [patent_title] => 'Method and system for updating a modeled object in a product lifecycle management system' [patent_app_type] => utility [patent_app_number] => 12/603833 [patent_app_country] => US [patent_app_date] => 2009-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 5993 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12603833 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/603833
Method and system for updating a modeled object in a product lifecycle management system Oct 21, 2009 Issued
Array ( [id] => 6040203 [patent_doc_number] => 20110093252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'METHOD OF ACCURATELY SIMULATING A TARGET MACHINE ON A SIMULATOR' [patent_app_type] => utility [patent_app_number] => 12/580338 [patent_app_country] => US [patent_app_date] => 2009-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2737 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20110093252.pdf [firstpage_image] =>[orig_patent_app_number] => 12580338 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/580338
METHOD OF ACCURATELY SIMULATING A TARGET MACHINE ON A SIMULATOR Oct 15, 2009 Abandoned
Array ( [id] => 7716104 [patent_doc_number] => 20120006560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'Forming A Model Of A Subsurface Region' [patent_app_type] => utility [patent_app_number] => 13/125934 [patent_app_country] => US [patent_app_date] => 2009-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8980 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20120006560.pdf [firstpage_image] =>[orig_patent_app_number] => 13125934 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/125934
Forming a model of a subsurface region Sep 30, 2009 Issued
Array ( [id] => 8692621 [patent_doc_number] => 08392156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Power supply noise analysis model creation method and apparatus, and recording medium storing program for power supply noise analysis model creation' [patent_app_type] => utility [patent_app_number] => 12/567923 [patent_app_country] => US [patent_app_date] => 2009-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 9463 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 474 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12567923 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/567923
Power supply noise analysis model creation method and apparatus, and recording medium storing program for power supply noise analysis model creation Sep 27, 2009 Issued
Array ( [id] => 8308163 [patent_doc_number] => 08229714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-24 [patent_title] => 'Method for simulating a physical property of a technical structure by a component model' [patent_app_type] => utility [patent_app_number] => 12/560101 [patent_app_country] => US [patent_app_date] => 2009-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2821 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12560101 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/560101
Method for simulating a physical property of a technical structure by a component model Sep 14, 2009 Issued
Array ( [id] => 10059299 [patent_doc_number] => 09098661 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-08-04 [patent_title] => 'Extensible platform for back-annotation of target-specific characterization onto a model of a hardware system' [patent_app_type] => utility [patent_app_number] => 12/558332 [patent_app_country] => US [patent_app_date] => 2009-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 8775 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12558332 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/558332
Extensible platform for back-annotation of target-specific characterization onto a model of a hardware system Sep 10, 2009 Issued
Array ( [id] => 7803252 [patent_doc_number] => 08131534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-06 [patent_title] => 'Emulating a host architecture in guest firmware' [patent_app_type] => utility [patent_app_number] => 12/535028 [patent_app_country] => US [patent_app_date] => 2009-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2900 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/131/08131534.pdf [firstpage_image] =>[orig_patent_app_number] => 12535028 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/535028
Emulating a host architecture in guest firmware Aug 3, 2009 Issued
Array ( [id] => 9947011 [patent_doc_number] => 08996337 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-31 [patent_title] => 'Hierarchical position-based dynamics' [patent_app_type] => utility [patent_app_number] => 12/501323 [patent_app_country] => US [patent_app_date] => 2009-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 10 [patent_no_of_words] => 11045 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12501323 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/501323
Hierarchical position-based dynamics Jul 9, 2009 Issued
Array ( [id] => 6226033 [patent_doc_number] => 20100057428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'Method and computer system for the computer simulation of a plant or a machine' [patent_app_type] => utility [patent_app_number] => 12/459642 [patent_app_country] => US [patent_app_date] => 2009-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3136 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20100057428.pdf [firstpage_image] =>[orig_patent_app_number] => 12459642 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/459642
Method and computer system for the computer simulation of a plant or a machine Jul 5, 2009 Abandoned
Array ( [id] => 8911921 [patent_doc_number] => 08483997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-09 [patent_title] => 'Predictive modeling of contact and via modules for advanced on-chip interconnect technology' [patent_app_type] => utility [patent_app_number] => 12/493110 [patent_app_country] => US [patent_app_date] => 2009-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5937 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12493110 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493110
Predictive modeling of contact and via modules for advanced on-chip interconnect technology Jun 25, 2009 Issued
Array ( [id] => 6393116 [patent_doc_number] => 20100318327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'METHOD OF DESIGN OPTIMISATION' [patent_app_type] => utility [patent_app_number] => 12/482003 [patent_app_country] => US [patent_app_date] => 2009-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 12085 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20100318327.pdf [firstpage_image] =>[orig_patent_app_number] => 12482003 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/482003
Method of design optimisation Jun 9, 2009 Issued
Array ( [id] => 6408681 [patent_doc_number] => 20100305933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'Method and Apparatus for Verifying Logic Circuits Using Vector Emulation with Vector Substitution' [patent_app_type] => utility [patent_app_number] => 12/476012 [patent_app_country] => US [patent_app_date] => 2009-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2573 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0305/20100305933.pdf [firstpage_image] =>[orig_patent_app_number] => 12476012 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/476012
Method and Apparatus for Verifying Logic Circuits Using Vector Emulation with Vector Substitution May 31, 2009 Abandoned
Array ( [id] => 8148848 [patent_doc_number] => 08165855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-24 [patent_title] => 'Method for modeling fluid flow over porous blocks' [patent_app_type] => utility [patent_app_number] => 12/453926 [patent_app_country] => US [patent_app_date] => 2009-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4965 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/165/08165855.pdf [firstpage_image] =>[orig_patent_app_number] => 12453926 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/453926
Method for modeling fluid flow over porous blocks May 26, 2009 Issued
Array ( [id] => 9102183 [patent_doc_number] => 08566074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Mapping between stress-test systems and real world systems' [patent_app_type] => utility [patent_app_number] => 12/468622 [patent_app_country] => US [patent_app_date] => 2009-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5360 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 334 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12468622 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/468622
Mapping between stress-test systems and real world systems May 18, 2009 Issued
Array ( [id] => 7755632 [patent_doc_number] => 08112263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-07 [patent_title] => 'Method for logic checking to check operation of circuit to be connected to bus' [patent_app_type] => utility [patent_app_number] => 12/432394 [patent_app_country] => US [patent_app_date] => 2009-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 6377 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/112/08112263.pdf [firstpage_image] =>[orig_patent_app_number] => 12432394 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/432394
Method for logic checking to check operation of circuit to be connected to bus Apr 28, 2009 Issued
Array ( [id] => 6587310 [patent_doc_number] => 20100274545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'Bonded Rework Simulation Tool' [patent_app_type] => utility [patent_app_number] => 12/430541 [patent_app_country] => US [patent_app_date] => 2009-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8695 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20100274545.pdf [firstpage_image] =>[orig_patent_app_number] => 12430541 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/430541
Bonded rework simulation tool Apr 26, 2009 Issued
Array ( [id] => 5570939 [patent_doc_number] => 20090254318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-08 [patent_title] => 'Simultaneous active and passive optical fiber amplification method' [patent_app_type] => utility [patent_app_number] => 12/385017 [patent_app_country] => US [patent_app_date] => 2009-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3337 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20090254318.pdf [firstpage_image] =>[orig_patent_app_number] => 12385017 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/385017
Simultaneous active and passive optical fiber amplification method Mar 29, 2009 Abandoned
Array ( [id] => 8958558 [patent_doc_number] => 08504347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Simulation apparatus, simulation method, and program to perform simulation on design data of a target circuit' [patent_app_type] => utility [patent_app_number] => 12/405617 [patent_app_country] => US [patent_app_date] => 2009-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8778 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12405617 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/405617
Simulation apparatus, simulation method, and program to perform simulation on design data of a target circuit Mar 16, 2009 Issued
Array ( [id] => 5946683 [patent_doc_number] => 20110106509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'IMPROVED TECHNIQUES FOR STOCHASTIC COMBINATORIAL OPTIMIZATION' [patent_app_type] => utility [patent_app_number] => 12/736003 [patent_app_country] => US [patent_app_date] => 2009-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 18786 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20110106509.pdf [firstpage_image] =>[orig_patent_app_number] => 12736003 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/736003
IMPROVED TECHNIQUES FOR STOCHASTIC COMBINATORIAL OPTIMIZATION Mar 4, 2009 Abandoned
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