
Juan Carlos Ochoa
Examiner (ID: 13650, Phone: (571)272-2625 , Office: P/2123 )
| Most Active Art Unit | 2123 |
| Art Unit(s) | 2123, 2186, 2146, 2187, 2127 |
| Total Applications | 672 |
| Issued Applications | 410 |
| Pending Applications | 75 |
| Abandoned Applications | 195 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 290220
[patent_doc_number] => 07548841
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[patent_kind] => B2
[patent_issue_date] => 2009-06-16
[patent_title] => 'Method for logic checking to check operation of circuit to be connected to bus'
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Array
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[patent_title] => 'Test quality through resource reallocation'
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Array
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[patent_title] => 'Power modelling of a circuit'
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Array
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[patent_title] => 'Hierarchical reduced-order circuit model for clock net verification'
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Array
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Array
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[patent_title] => 'Method of determining by numerical simulation the restoration conditions, by the fluids of a reservoir, of a complex well damaged by drilling operations'
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Array
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[patent_title] => 'Method for creating a characterized digital library for a digital circuit design'
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Array
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Array
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[patent_title] => 'Coupler interface for facilitating distributed simulation of a partitioned logic design'
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Array
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Array
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Array
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Array
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Array
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Array
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Array
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