Search

Julia Slutsker

Examiner (ID: 18953, Phone: (571)270-3849 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2891, 4193
Total Applications
1178
Issued Applications
838
Pending Applications
138
Abandoned Applications
254

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19735323 [patent_doc_number] => 12213340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Display panel, display apparatus and method for manufacturing display panel [patent_app_type] => utility [patent_app_number] => 17/562850 [patent_app_country] => US [patent_app_date] => 2021-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 8327 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17562850 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/562850
Display panel, display apparatus and method for manufacturing display panel Dec 26, 2021 Issued
Array ( [id] => 18564701 [patent_doc_number] => 11729971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Trench structures for three-dimensional memory devices [patent_app_type] => utility [patent_app_number] => 17/645102 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 10762 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17645102 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/645102
Trench structures for three-dimensional memory devices Dec 19, 2021 Issued
Array ( [id] => 18143395 [patent_doc_number] => 20230017244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => METHOD OF FORMING NANOCRYSTALLINE GRAPHENE [patent_app_type] => utility [patent_app_number] => 17/552756 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6701 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17552756 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/552756
Method of forming nanocrystalline graphene Dec 15, 2021 Issued
Array ( [id] => 18439979 [patent_doc_number] => 20230187274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => DIELECTRIC PLANARIZATION USING A METAL OVERBURDEN WITH ETCH-STOP LAYERS [patent_app_type] => utility [patent_app_number] => 17/551541 [patent_app_country] => US [patent_app_date] => 2021-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7190 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17551541 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/551541
DIELECTRIC PLANARIZATION USING A METAL OVERBURDEN WITH ETCH-STOP LAYERS Dec 14, 2021 Abandoned
Array ( [id] => 19199192 [patent_doc_number] => 11996441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Semiconductor device for high voltage applications [patent_app_type] => utility [patent_app_number] => 17/547288 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 6687 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17547288 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/547288
Semiconductor device for high voltage applications Dec 9, 2021 Issued
Array ( [id] => 19919843 [patent_doc_number] => 12295239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Flexible display panel, flexible display device [patent_app_type] => utility [patent_app_number] => 17/622872 [patent_app_country] => US [patent_app_date] => 2021-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17622872 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/622872
Flexible display panel, flexible display device Dec 8, 2021 Issued
Array ( [id] => 19741369 [patent_doc_number] => 12218217 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Layer structure including dielectric layer, methods of manufacturing the layer structure, and electronic device including the layer structure [patent_app_type] => utility [patent_app_number] => 17/545442 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6190 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545442 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545442
Layer structure including dielectric layer, methods of manufacturing the layer structure, and electronic device including the layer structure Dec 7, 2021 Issued
Array ( [id] => 17692645 [patent_doc_number] => 20220199938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => DISPLAY PANEL AND ELECTROLUMINESCENT DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/538152 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17463 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17538152 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/538152
Display panel and electroluminescent display device including the same Nov 29, 2021 Issued
Array ( [id] => 19153735 [patent_doc_number] => 11978658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Method for manufacturing a polysilicon SOI substrate including a cavity [patent_app_type] => utility [patent_app_number] => 17/456030 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 3114 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17456030 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/456030
Method for manufacturing a polysilicon SOI substrate including a cavity Nov 21, 2021 Issued
Array ( [id] => 19539534 [patent_doc_number] => 12132091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Work function layers for transistor gate electrodes [patent_app_type] => utility [patent_app_number] => 17/532062 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6436 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17532062 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/532062
Work function layers for transistor gate electrodes Nov 21, 2021 Issued
Array ( [id] => 18857269 [patent_doc_number] => 11854864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Semiconductor device including trench isolation layer and method of forming the same [patent_app_type] => utility [patent_app_number] => 17/530169 [patent_app_country] => US [patent_app_date] => 2021-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 8484 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17530169 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/530169
Semiconductor device including trench isolation layer and method of forming the same Nov 17, 2021 Issued
Array ( [id] => 17431962 [patent_doc_number] => 20220059671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => Negative-Capacitance and Ferroelectric Field-Effect Transistor (NCFET and FE-FET) Devices [patent_app_type] => utility [patent_app_number] => 17/521344 [patent_app_country] => US [patent_app_date] => 2021-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10521 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17521344 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/521344
Negative-capacitance and ferroelectric field-effect transistor (NCFET and FE-FET) devices Nov 7, 2021 Issued
Array ( [id] => 17417244 [patent_doc_number] => 20220052148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => Light-Emitting Diode Displays [patent_app_type] => utility [patent_app_number] => 17/513643 [patent_app_country] => US [patent_app_date] => 2021-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10578 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17513643 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/513643
Light-emitting diode displays Oct 27, 2021 Issued
Array ( [id] => 18706457 [patent_doc_number] => 11792989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Word line structure of three-dimensional memory device [patent_app_type] => utility [patent_app_number] => 17/509891 [patent_app_country] => US [patent_app_date] => 2021-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 12867 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17509891 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/509891
Word line structure of three-dimensional memory device Oct 24, 2021 Issued
Array ( [id] => 19349228 [patent_doc_number] => 20240258192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/551950 [patent_app_country] => US [patent_app_date] => 2021-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10069 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18551950 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/551950
SEMICONDUCTOR DEVICE Oct 20, 2021 Pending
Array ( [id] => 19349228 [patent_doc_number] => 20240258192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/551950 [patent_app_country] => US [patent_app_date] => 2021-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10069 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18551950 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/551950
SEMICONDUCTOR DEVICE Oct 20, 2021 Pending
Array ( [id] => 19314403 [patent_doc_number] => 12040228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/495417 [patent_app_country] => US [patent_app_date] => 2021-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3214 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17495417 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/495417
Semiconductor device and manufacturing method thereof Oct 5, 2021 Issued
Array ( [id] => 17485892 [patent_doc_number] => 20220093396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => METHOD FOR PRODUCING THREE-DIMENSIONAL STRUCTURE, METHOD FOR PRODUCING VERTICAL TRANSISTOR, VERTICAL TRANSISTOR WAFER, AND VERTICAL TRANSISTOR SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/488883 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4753 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488883 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/488883
Method for producing three-dimensional structure, method for producing vertical transistor, vertical transistor wafer, and vertical transistor substrate Sep 28, 2021 Issued
Array ( [id] => 18266221 [patent_doc_number] => 20230087463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => GATE OXIDE FABRICATION AND SYSTEM [patent_app_type] => utility [patent_app_number] => 17/483286 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3931 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17483286 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/483286
Gate oxide fabrication and system Sep 22, 2021 Issued
Array ( [id] => 18492975 [patent_doc_number] => 11698387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Physical quantity sensor, inertial measurement unit, and method for manufacturing physical quantity sensor [patent_app_type] => utility [patent_app_number] => 17/474145 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 33 [patent_no_of_words] => 11708 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17474145 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/474145
Physical quantity sensor, inertial measurement unit, and method for manufacturing physical quantity sensor Sep 13, 2021 Issued
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