Search

Julia Slutsker

Examiner (ID: 6859, Phone: (571)270-3849 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
4193, 2891
Total Applications
1221
Issued Applications
866
Pending Applications
116
Abandoned Applications
260

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19487413 [patent_doc_number] => 12107139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 18/369450 [patent_app_country] => US [patent_app_date] => 2023-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 29 [patent_no_of_words] => 11169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18369450 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/369450
Semiconductor device Sep 17, 2023 Issued
Array ( [id] => 19054651 [patent_doc_number] => 20240096620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => METHOD OF FILLING A TRENCH FORMED IN A SEMICONDUCTOR SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/466542 [patent_app_country] => US [patent_app_date] => 2023-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3311 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18466542 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/466542
METHOD OF FILLING A TRENCH FORMED IN A SEMICONDUCTOR SUBSTRATE Sep 12, 2023 Pending
Array ( [id] => 19116529 [patent_doc_number] => 20240128279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/465671 [patent_app_country] => US [patent_app_date] => 2023-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21287 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -32 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18465671 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/465671
DISPLAY DEVICE Sep 11, 2023 Pending
Array ( [id] => 19038073 [patent_doc_number] => 20240087888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => METHOD OF FORMING A SI-COMPRISING EPITAXIAL LAYER SELECTIVELY ON A SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/465835 [patent_app_country] => US [patent_app_date] => 2023-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9766 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18465835 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/465835
METHOD OF FORMING A SI-COMPRISING EPITAXIAL LAYER SELECTIVELY ON A SUBSTRATE Sep 11, 2023 Pending
Array ( [id] => 20869862 [patent_doc_number] => 12696781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-28 [patent_title] => Integrated package and method for making the same [patent_app_type] => utility [patent_app_number] => 18/460623 [patent_app_country] => US [patent_app_date] => 2023-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 1054 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460623 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/460623
INTEGRATED PACKAGE AND METHOD FOR MAKING THE SAME Sep 3, 2023 Issued
Array ( [id] => 19783265 [patent_doc_number] => 12232320 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Word line structure of three-dimensional memory device [patent_app_type] => utility [patent_app_number] => 18/236815 [patent_app_country] => US [patent_app_date] => 2023-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 12899 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18236815 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/236815
Word line structure of three-dimensional memory device Aug 21, 2023 Issued
Array ( [id] => 19696396 [patent_doc_number] => 20250014941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => ISOLATION STRUCTURE OF SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/227991 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227991 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227991
Isolation structure of semiconductor device and method for fabricating the same Jul 30, 2023 Issued
Array ( [id] => 18789614 [patent_doc_number] => 20230378310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => Negative-Capacitance and Ferroelectric Field-Effect Transistor (NCFET and FE-FET) Devices [patent_app_type] => utility [patent_app_number] => 18/362064 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10549 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362064 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362064
Negative-capacitance and ferroelectric field-effect transistor (NCFET and FE-FET) devices Jul 30, 2023 Issued
Array ( [id] => 20133995 [patent_doc_number] => 12376326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Gate resistance improvement and method thereof [patent_app_type] => utility [patent_app_number] => 18/361514 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361514 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361514
Gate resistance improvement and method thereof Jul 27, 2023 Issued
Array ( [id] => 18774641 [patent_doc_number] => 20230369472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => NEGATIVE-CAPACITANCE AND FERROELECTRIC FIELD-EFFECT TRANSISTOR (NCFET AND FE-FET) DEVICES [patent_app_type] => utility [patent_app_number] => 18/358377 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13307 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358377 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/358377
Negative-capacitance and ferroelectric field-effect transistor (NCFET and FE-FET) devices Jul 24, 2023 Issued
Array ( [id] => 19728649 [patent_doc_number] => 20250031400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => FORKSHEET SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/224940 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9008 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224940 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/224940
FORKSHEET SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME Jul 20, 2023 Pending
Array ( [id] => 20776534 [patent_doc_number] => 12660226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Method of manufacturing a semiconductor device and a semiconductor device [patent_app_type] => utility [patent_app_number] => 18/224503 [patent_app_country] => US [patent_app_date] => 2023-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 2702 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224503 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/224503
Method of manufacturing a semiconductor device and a semiconductor device Jul 19, 2023 Issued
Array ( [id] => 19727118 [patent_doc_number] => 20250029869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => ISOLATION STRUCTURE HAVING DIFFERENT LINERS ON UPPER AND LOWER PORTIONS [patent_app_type] => utility [patent_app_number] => 18/353995 [patent_app_country] => US [patent_app_date] => 2023-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5173 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18353995 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/353995
ISOLATION STRUCTURE HAVING DIFFERENT LINERS ON UPPER AND LOWER PORTIONS Jul 17, 2023 Pending
Array ( [id] => 20720217 [patent_doc_number] => 12635489 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => High voltage semiconductor device and method of manufacturing same [patent_app_type] => utility [patent_app_number] => 18/353697 [patent_app_country] => US [patent_app_date] => 2023-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 1255 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18353697 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/353697
High voltage semiconductor device and method of manufacturing same Jul 16, 2023 Issued
Array ( [id] => 19221436 [patent_doc_number] => 20240186140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => Method for Forming Mixed Substrate [patent_app_type] => utility [patent_app_number] => 18/221976 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18221976 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/221976
Method for Forming Mixed Substrate Jul 13, 2023 Pending
Array ( [id] => 19688010 [patent_doc_number] => 20250006555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => FLEXIBLE MONOMER FOR SMOOTH POLYMER SURFACE [patent_app_type] => utility [patent_app_number] => 18/216127 [patent_app_country] => US [patent_app_date] => 2023-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7953 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216127 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/216127
Flexible monomer for smooth polymer surface Jun 28, 2023 Issued
Array ( [id] => 19662252 [patent_doc_number] => 20240429317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/341549 [patent_app_country] => US [patent_app_date] => 2023-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341549 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/341549
SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME Jun 25, 2023 Pending
Array ( [id] => 20540521 [patent_doc_number] => 12557610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Multilayer isolation structure for high voltage silicon-on-insulator device [patent_app_type] => utility [patent_app_number] => 18/336137 [patent_app_country] => US [patent_app_date] => 2023-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8983 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18336137 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/336137
Multilayer isolation structure for high voltage silicon-on-insulator device Jun 15, 2023 Issued
Array ( [id] => 18661532 [patent_doc_number] => 20230307546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => FIELD-EFFECT TRANSISTOR INCLUDING TRANSPARENT OXIDE AND LIGHT-SHIELDING MEMBER, AND DISPLAY UTILIZING THE TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/327289 [patent_app_country] => US [patent_app_date] => 2023-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5747 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18327289 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/327289
Field-effect transistor including transparent oxide and light-shielding member, and display utilizing the transistor May 31, 2023 Issued
Array ( [id] => 18653348 [patent_doc_number] => 20230299188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => RUGGEDIZED SYMMETRICALLY BIDIRECTIONAL BIPOLAR POWER TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/323202 [patent_app_country] => US [patent_app_date] => 2023-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4009 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18323202 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/323202
Ruggedized symmetrically bidirectional bipolar power transistor May 23, 2023 Issued
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