
Julian Chang
Examiner (ID: 7972, Phone: (571)272-8631 , Office: P/2455 )
| Most Active Art Unit | 2455 |
| Art Unit(s) | 2452, 2455, 2454, 2152 |
| Total Applications | 431 |
| Issued Applications | 276 |
| Pending Applications | 7 |
| Abandoned Applications | 142 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19237557
[patent_doc_number] => 20240194752
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/502352
[patent_app_country] => US
[patent_app_date] => 2023-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15429
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18502352
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/502352 | SEMICONDUCTOR DEVICE | Nov 5, 2023 | Pending |
Array
(
[id] => 19237557
[patent_doc_number] => 20240194752
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/502352
[patent_app_country] => US
[patent_app_date] => 2023-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15429
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18502352
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/502352 | SEMICONDUCTOR DEVICE | Nov 5, 2023 | Pending |
Array
(
[id] => 19285640
[patent_doc_number] => 20240222117
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM
[patent_app_type] => utility
[patent_app_number] => 18/377159
[patent_app_country] => US
[patent_app_date] => 2023-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14208
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18377159
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/377159 | METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM | Oct 4, 2023 | Pending |
Array
(
[id] => 19101138
[patent_doc_number] => 20240120366
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-11
[patent_title] => FERROELECTRIC NANOPARTICLE CAPACITOR FOR NON-BINARY LOGICS
[patent_app_type] => utility
[patent_app_number] => 18/376788
[patent_app_country] => US
[patent_app_date] => 2023-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11427
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18376788
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/376788 | FERROELECTRIC NANOPARTICLE CAPACITOR FOR NON-BINARY LOGICS | Oct 3, 2023 | Pending |
Array
(
[id] => 19893286
[patent_doc_number] => 20250118598
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-10
[patent_title] => INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/376594
[patent_app_country] => US
[patent_app_date] => 2023-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5077
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18376594
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/376594 | INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF | Oct 3, 2023 | Pending |
Array
(
[id] => 19223627
[patent_doc_number] => 20240188331
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-06
[patent_title] => DISPLAY PANEL AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/376565
[patent_app_country] => US
[patent_app_date] => 2023-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11574
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18376565
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/376565 | DISPLAY PANEL AND DISPLAY DEVICE | Oct 3, 2023 | Pending |
Array
(
[id] => 19101138
[patent_doc_number] => 20240120366
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-11
[patent_title] => FERROELECTRIC NANOPARTICLE CAPACITOR FOR NON-BINARY LOGICS
[patent_app_type] => utility
[patent_app_number] => 18/376788
[patent_app_country] => US
[patent_app_date] => 2023-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11427
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18376788
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/376788 | FERROELECTRIC NANOPARTICLE CAPACITOR FOR NON-BINARY LOGICS | Oct 3, 2023 | Pending |
Array
(
[id] => 19606956
[patent_doc_number] => 20240397836
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-28
[patent_title] => MEMORY DEVICE AND FORMATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/473580
[patent_app_country] => US
[patent_app_date] => 2023-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7961
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18473580
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/473580 | MEMORY DEVICE AND FORMATION METHOD THEREOF | Sep 24, 2023 | Pending |
Array
(
[id] => 19163128
[patent_doc_number] => 20240155835
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-09
[patent_title] => DYNAMIC RANDOM ACCESS MEMORY AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/473317
[patent_app_country] => US
[patent_app_date] => 2023-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3651
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18473317
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/473317 | DYNAMIC RANDOM ACCESS MEMORY AND MANUFACTURING METHOD THEREOF | Sep 24, 2023 | Pending |
Array
(
[id] => 19163128
[patent_doc_number] => 20240155835
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-09
[patent_title] => DYNAMIC RANDOM ACCESS MEMORY AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/473317
[patent_app_country] => US
[patent_app_date] => 2023-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3651
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18473317
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/473317 | DYNAMIC RANDOM ACCESS MEMORY AND MANUFACTURING METHOD THEREOF | Sep 24, 2023 | Pending |
Array
(
[id] => 19818133
[patent_doc_number] => 20250076340
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-06
[patent_title] => INTEGRATED CIRCUIT CONDUCTIVE STRUCTURE FOR CIRCUIT PROBE TESTING
[patent_app_type] => utility
[patent_app_number] => 18/459565
[patent_app_country] => US
[patent_app_date] => 2023-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6611
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459565
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/459565 | INTEGRATED CIRCUIT CONDUCTIVE STRUCTURE FOR CIRCUIT PROBE TESTING | Aug 31, 2023 | Pending |
Array
(
[id] => 19221518
[patent_doc_number] => 20240186222
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-06
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/460518
[patent_app_country] => US
[patent_app_date] => 2023-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3634
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460518
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/460518 | SEMICONDUCTOR DEVICE | Aug 31, 2023 | Pending |
Array
(
[id] => 19191431
[patent_doc_number] => 20240170344
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-23
[patent_title] => METHOD FOR MANUFACTURING SOURCE/DRAIN EPITAXIAL LAYER OF FDSOI MOSFET
[patent_app_type] => utility
[patent_app_number] => 18/458946
[patent_app_country] => US
[patent_app_date] => 2023-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4890
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 420
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458946
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/458946 | METHOD FOR MANUFACTURING SOURCE/DRAIN EPITAXIAL LAYER OF FDSOI MOSFET | Aug 29, 2023 | Pending |
Array
(
[id] => 19054675
[patent_doc_number] => 20240096644
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => PATTERN FORMING METHOD, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/458056
[patent_app_country] => US
[patent_app_date] => 2023-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4727
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458056
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/458056 | PATTERN FORMING METHOD, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE | Aug 28, 2023 | Pending |
Array
(
[id] => 19237444
[patent_doc_number] => 20240194639
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/220053
[patent_app_country] => US
[patent_app_date] => 2023-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6733
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18220053
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/220053 | SEMICONDUCTOR PACKAGE | Jul 9, 2023 | Pending |
Array
(
[id] => 19662165
[patent_doc_number] => 20240429230
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-26
[patent_title] => INTEGRATED RESISTORS WITH INCREASED SHEET RESISTANCE FOR RF APPLICATIONS AND METHODS OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/337657
[patent_app_country] => US
[patent_app_date] => 2023-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12612
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18337657
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/337657 | INTEGRATED RESISTORS WITH INCREASED SHEET RESISTANCE FOR RF APPLICATIONS AND METHODS OF FABRICATING THE SAME | Jun 19, 2023 | Pending |
Array
(
[id] => 19468318
[patent_doc_number] => 20240321988
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/188020
[patent_app_country] => US
[patent_app_date] => 2023-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14179
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188020
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/188020 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | Mar 21, 2023 | Pending |
Array
(
[id] => 19468318
[patent_doc_number] => 20240321988
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/188020
[patent_app_country] => US
[patent_app_date] => 2023-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14179
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188020
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/188020 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | Mar 21, 2023 | Pending |
Array
(
[id] => 19468288
[patent_doc_number] => 20240321958
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => Semiconductor Devices and Methods of Designing and Forming the Same
[patent_app_type] => utility
[patent_app_number] => 18/187233
[patent_app_country] => US
[patent_app_date] => 2023-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13090
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18187233
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/187233 | Semiconductor Devices and Methods of Designing and Forming the Same | Mar 20, 2023 | Pending |
Array
(
[id] => 18866061
[patent_doc_number] => 20230420498
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => Enhancement High Electron Mobility Transistor and Manufacturing Method Thereof
[patent_app_type] => utility
[patent_app_number] => 18/164571
[patent_app_country] => US
[patent_app_date] => 2023-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4946
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 23
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18164571
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/164571 | Enhancement High Electron Mobility Transistor and Manufacturing Method Thereof | Feb 3, 2023 | Pending |