Search

Julie Ann Szpira

Examiner (ID: 17120, Phone: (571)270-3866 , Office: P/3731 )

Most Active Art Unit
3731
Art Unit(s)
3771, 3731
Total Applications
735
Issued Applications
495
Pending Applications
11
Abandoned Applications
238

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16528779 [patent_doc_number] => 20200402860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => MINIMIZE MIDDLE-OF-LINE CONTACT LINE SHORTS [patent_app_type] => utility [patent_app_number] => 17/011085 [patent_app_country] => US [patent_app_date] => 2020-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4507 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17011085 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/011085
Minimize middle-of-line contact line shorts Sep 2, 2020 Issued
Array ( [id] => 18156221 [patent_doc_number] => 11569215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Three-dimensional memory device with vertical field effect transistors and method of making thereof [patent_app_type] => utility [patent_app_number] => 17/007823 [patent_app_country] => US [patent_app_date] => 2020-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 47 [patent_no_of_words] => 12747 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17007823 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/007823
Three-dimensional memory device with vertical field effect transistors and method of making thereof Aug 30, 2020 Issued
Array ( [id] => 17115702 [patent_doc_number] => 20210296299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/006643 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17006643 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/006643
Semiconductor device Aug 27, 2020 Issued
Array ( [id] => 18645622 [patent_doc_number] => 11769700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => Semiconductor substrate, semiconductor package including semiconductor substrate, and test method of semiconductor substrate [patent_app_type] => utility [patent_app_number] => 16/997377 [patent_app_country] => US [patent_app_date] => 2020-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9986 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997377 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/997377
Semiconductor substrate, semiconductor package including semiconductor substrate, and test method of semiconductor substrate Aug 18, 2020 Issued
Array ( [id] => 17410192 [patent_doc_number] => 11251089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/984604 [patent_app_country] => US [patent_app_date] => 2020-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6052 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16984604 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/984604
Semiconductor device Aug 3, 2020 Issued
Array ( [id] => 17063275 [patent_doc_number] => 11107888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 16/983939 [patent_app_country] => US [patent_app_date] => 2020-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 16029 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16983939 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/983939
Method for manufacturing semiconductor device Aug 2, 2020 Issued
Array ( [id] => 17652980 [patent_doc_number] => 11355722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Light-emitting element [patent_app_type] => utility [patent_app_number] => 16/944257 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 49 [patent_no_of_words] => 20456 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16944257 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/944257
Light-emitting element Jul 30, 2020 Issued
Array ( [id] => 16624947 [patent_doc_number] => 20210043600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/943241 [patent_app_country] => US [patent_app_date] => 2020-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8910 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16943241 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/943241
Display device and method of manufacturing the same Jul 29, 2020 Issued
Array ( [id] => 17359939 [patent_doc_number] => 20220020735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT DEVICE HAVING A BACKSIDE POWER DELIVERY NETWORK [patent_app_type] => utility [patent_app_number] => 16/928939 [patent_app_country] => US [patent_app_date] => 2020-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16928939 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/928939
Three-dimensional (3D) integrated circuit device having a backside power delivery network Jul 13, 2020 Issued
Array ( [id] => 16402351 [patent_doc_number] => 20200343209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => Interconnect Structures and Methods of Forming Same [patent_app_type] => utility [patent_app_number] => 16/923739 [patent_app_country] => US [patent_app_date] => 2020-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6121 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16923739 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/923739
Interconnect structures and methods of forming same Jul 7, 2020 Issued
Array ( [id] => 16545215 [patent_doc_number] => 20200411630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/908986 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9984 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16908986 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/908986
Display device and method for manufacturing the same Jun 22, 2020 Issued
Array ( [id] => 18249022 [patent_doc_number] => 11605620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Three-dimensional (3D) integrated circuit with passive elements formed by hybrid bonding [patent_app_type] => utility [patent_app_number] => 16/906509 [patent_app_country] => US [patent_app_date] => 2020-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4059 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16906509 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/906509
Three-dimensional (3D) integrated circuit with passive elements formed by hybrid bonding Jun 18, 2020 Issued
Array ( [id] => 16812140 [patent_doc_number] => 20210134695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => INTERPOSER BOARD HAVING HEATING FUNCTION AND ELECTRONIC DEVICE USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/903491 [patent_app_country] => US [patent_app_date] => 2020-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3818 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16903491 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/903491
INTERPOSER BOARD HAVING HEATING FUNCTION AND ELECTRONIC DEVICE USING THE SAME Jun 16, 2020 Abandoned
Array ( [id] => 16341902 [patent_doc_number] => 20200306552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => Interconnect Structure and Method of Forming Same [patent_app_type] => utility [patent_app_number] => 16/901884 [patent_app_country] => US [patent_app_date] => 2020-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6565 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16901884 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/901884
Interconnect structure and method of forming same Jun 14, 2020 Issued
Array ( [id] => 16645739 [patent_doc_number] => 10923607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Solid state imaging apparatus, production method thereof and electronic device [patent_app_type] => utility [patent_app_number] => 16/893111 [patent_app_country] => US [patent_app_date] => 2020-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 50 [patent_no_of_words] => 13703 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16893111 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/893111
Solid state imaging apparatus, production method thereof and electronic device Jun 3, 2020 Issued
Array ( [id] => 16814354 [patent_doc_number] => 20210136909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => INTERPOSER BOARD HAVING HEATING FUNCTION AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/891290 [patent_app_country] => US [patent_app_date] => 2020-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16891290 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/891290
INTERPOSER BOARD HAVING HEATING FUNCTION AND ELECTRONIC DEVICE Jun 2, 2020 Abandoned
Array ( [id] => 17262726 [patent_doc_number] => 20210375711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/885304 [patent_app_country] => US [patent_app_date] => 2020-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885304 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/885304
Semiconductor package and manufacturing method thereof May 27, 2020 Issued
Array ( [id] => 18073740 [patent_doc_number] => 11532580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Interconnect structure, semiconductor structure including interconnect structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/883929 [patent_app_country] => US [patent_app_date] => 2020-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10784 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 445 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16883929 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/883929
Interconnect structure, semiconductor structure including interconnect structure and method for forming the same May 25, 2020 Issued
Array ( [id] => 18261691 [patent_doc_number] => 11609391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-21 [patent_title] => Semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/877498 [patent_app_country] => US [patent_app_date] => 2020-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 11282 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16877498 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/877498
Semiconductor package and manufacturing method thereof May 18, 2020 Issued
Array ( [id] => 16284787 [patent_doc_number] => 20200278389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => DIE TESTING USING TOP SURFACE TEST PADS [patent_app_type] => utility [patent_app_number] => 16/875628 [patent_app_country] => US [patent_app_date] => 2020-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5689 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16875628 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/875628
Die testing using top surface test pads May 14, 2020 Issued
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