Search

June Y. Sison

Examiner (ID: 12192, Phone: (571)270-5693 , Office: P/2443 )

Most Active Art Unit
2443
Art Unit(s)
2455, 2443
Total Applications
528
Issued Applications
352
Pending Applications
50
Abandoned Applications
139

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9074261 [patent_doc_number] => 08551839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Non-volatile storage with substrate cut-out and process of fabricating' [patent_app_type] => utility [patent_app_number] => 13/043980 [patent_app_country] => US [patent_app_date] => 2011-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 5865 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13043980 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/043980
Non-volatile storage with substrate cut-out and process of fabricating Mar 8, 2011 Issued
Array ( [id] => 5963238 [patent_doc_number] => 20110147835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'SEMICONDUCTOR DEVICES HAVING REDUCED GATE-DRAIN CAPACITANCE' [patent_app_type] => utility [patent_app_number] => 13/034084 [patent_app_country] => US [patent_app_date] => 2011-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5793 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20110147835.pdf [firstpage_image] =>[orig_patent_app_number] => 13034084 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/034084
Semiconductor devices having reduced gate-drain capacitance Feb 23, 2011 Issued
Array ( [id] => 6143554 [patent_doc_number] => 20110129955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'DELAMINATION AND CRACK RESISTANT IMAGE SENSOR STRUCTURES AND METHODS' [patent_app_type] => utility [patent_app_number] => 13/025681 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6665 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20110129955.pdf [firstpage_image] =>[orig_patent_app_number] => 13025681 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025681
Delamination and crack resistant image sensor structures and methods Feb 10, 2011 Issued
Array ( [id] => 6177728 [patent_doc_number] => 20110121432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'Semiconductor Device and Method of Forming Holes In Substrate to Interconnect Top Shield and Ground Shield' [patent_app_type] => utility [patent_app_number] => 13/019541 [patent_app_country] => US [patent_app_date] => 2011-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3020 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20110121432.pdf [firstpage_image] =>[orig_patent_app_number] => 13019541 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/019541
Semiconductor device and method of forming holes in substrate to interconnect top shield and ground shield Feb 1, 2011 Issued
Array ( [id] => 6177734 [patent_doc_number] => 20110121436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'METHOD FOR FORMING DUAL HIGH-K METAL GATE USING PHOTORESIST MASK AND STRUCTURES THEREOF' [patent_app_type] => utility [patent_app_number] => 13/018888 [patent_app_country] => US [patent_app_date] => 2011-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2067 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20110121436.pdf [firstpage_image] =>[orig_patent_app_number] => 13018888 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/018888
Method for forming dual high-K metal gate using photoresist mask and structures thereof Jan 31, 2011 Issued
Array ( [id] => 8375814 [patent_doc_number] => 08258610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-04 [patent_title] => 'Integrated circuit devices including a multi-layer structure with a contact extending therethrough' [patent_app_type] => utility [patent_app_number] => 13/016054 [patent_app_country] => US [patent_app_date] => 2011-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5985 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13016054 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/016054
Integrated circuit devices including a multi-layer structure with a contact extending therethrough Jan 27, 2011 Issued
Array ( [id] => 8310551 [patent_doc_number] => 20120187565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'Device Including Two Semiconductor Chips and Manufacturing Thereof' [patent_app_type] => utility [patent_app_number] => 13/013022 [patent_app_country] => US [patent_app_date] => 2011-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7111 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13013022 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/013022
Device including two semiconductor chips and manufacturing thereof Jan 24, 2011 Issued
Array ( [id] => 8310551 [patent_doc_number] => 20120187565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'Device Including Two Semiconductor Chips and Manufacturing Thereof' [patent_app_type] => utility [patent_app_number] => 13/013022 [patent_app_country] => US [patent_app_date] => 2011-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7111 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13013022 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/013022
Device including two semiconductor chips and manufacturing thereof Jan 24, 2011 Issued
Array ( [id] => 8310551 [patent_doc_number] => 20120187565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'Device Including Two Semiconductor Chips and Manufacturing Thereof' [patent_app_type] => utility [patent_app_number] => 13/013022 [patent_app_country] => US [patent_app_date] => 2011-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7111 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13013022 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/013022
Device including two semiconductor chips and manufacturing thereof Jan 24, 2011 Issued
Array ( [id] => 8310551 [patent_doc_number] => 20120187565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'Device Including Two Semiconductor Chips and Manufacturing Thereof' [patent_app_type] => utility [patent_app_number] => 13/013022 [patent_app_country] => US [patent_app_date] => 2011-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7111 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13013022 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/013022
Device including two semiconductor chips and manufacturing thereof Jan 24, 2011 Issued
Array ( [id] => 10013750 [patent_doc_number] => 09056760 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-16 [patent_title] => 'Miniaturized electrical component comprising an MEMS and an ASIC and production method' [patent_app_type] => utility [patent_app_number] => 13/520923 [patent_app_country] => US [patent_app_date] => 2011-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 5520 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13520923 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/520923
Miniaturized electrical component comprising an MEMS and an ASIC and production method Jan 23, 2011 Issued
Array ( [id] => 8270791 [patent_doc_number] => 08212301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Capacitor and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/008831 [patent_app_country] => US [patent_app_date] => 2011-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3255 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13008831 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/008831
Capacitor and method for fabricating the same Jan 17, 2011 Issued
Array ( [id] => 8082877 [patent_doc_number] => 08148758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-03 [patent_title] => 'High voltage semiconductor device with JFET regions containing dielectrically isolated junctions and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/928682 [patent_app_country] => US [patent_app_date] => 2010-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 44 [patent_no_of_words] => 5367 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/148/08148758.pdf [firstpage_image] =>[orig_patent_app_number] => 12928682 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/928682
High voltage semiconductor device with JFET regions containing dielectrically isolated junctions and method of fabricating the same Dec 15, 2010 Issued
Array ( [id] => 8543955 [patent_doc_number] => 08319249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Semiconductor light emitting device' [patent_app_type] => utility [patent_app_number] => 12/970701 [patent_app_country] => US [patent_app_date] => 2010-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 37 [patent_no_of_words] => 9570 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12970701 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/970701
Semiconductor light emitting device Dec 15, 2010 Issued
Array ( [id] => 6126824 [patent_doc_number] => 20110086478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'SYSTEMS AND METHODS FOR INTEGRATED CIRCUITS COMPRISING MULTIPLE BODY BIASING DOMAINS' [patent_app_type] => utility [patent_app_number] => 12/968032 [patent_app_country] => US [patent_app_date] => 2010-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20110086478.pdf [firstpage_image] =>[orig_patent_app_number] => 12968032 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/968032
Systems and methods for integrated circuits comprising multiple body biasing domains Dec 13, 2010 Issued
Array ( [id] => 6119707 [patent_doc_number] => 20110076817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'INTEGRATED CIRCUIT DEVICE WITH A SEMICONDUCTOR BODY AND METHOD FOR THE PRODUCTION OF AN INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 12/961996 [patent_app_country] => US [patent_app_date] => 2010-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5145 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20110076817.pdf [firstpage_image] =>[orig_patent_app_number] => 12961996 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/961996
Integrated circuit device with a semiconductor body and method for the production of an integrated circuit device Dec 6, 2010 Issued
Array ( [id] => 8603990 [patent_doc_number] => 20130009302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-10 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 13/520255 [patent_app_country] => US [patent_app_date] => 2010-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 13028 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13520255 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/520255
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR Dec 1, 2010 Abandoned
Array ( [id] => 8713749 [patent_doc_number] => 08399891 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Active device array substrate and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/943933 [patent_app_country] => US [patent_app_date] => 2010-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6007 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12943933 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/943933
Active device array substrate and method for fabricating the same Nov 10, 2010 Issued
Array ( [id] => 7762790 [patent_doc_number] => 20120032319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-09 [patent_title] => 'HIGH-VOLTAGE PACKAGED DEVICE' [patent_app_type] => utility [patent_app_number] => 12/944192 [patent_app_country] => US [patent_app_date] => 2010-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5509 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20120032319.pdf [firstpage_image] =>[orig_patent_app_number] => 12944192 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/944192
High-voltage packaged device Nov 10, 2010 Issued
Array ( [id] => 8192892 [patent_doc_number] => 20120119294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'CREATING ANISOTROPICALLY DIFFUSED JUNCTIONS IN FIELD EFFECT TRANSISTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 12/943987 [patent_app_country] => US [patent_app_date] => 2010-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2831 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119294.pdf [firstpage_image] =>[orig_patent_app_number] => 12943987 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/943987
Creating anisotropically diffused junctions in field effect transistor devices Nov 10, 2010 Issued
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