Search

Jung H. Hur

Examiner (ID: 14455, Phone: (571)272-1870 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
1178
Issued Applications
1001
Pending Applications
11
Abandoned Applications
169

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11020905 [patent_doc_number] => 20160217859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/088605 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7560 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15088605 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/088605
SEMICONDUCTOR DEVICE Mar 31, 2016 Abandoned
Array ( [id] => 11014080 [patent_doc_number] => 20160211034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'APPARATUS AND METHODS FOR DETERMINING A PASS/FAIL CONDITION OF A MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/084943 [patent_app_country] => US [patent_app_date] => 2016-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5629 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15084943 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/084943
Apparatus and methods for determining a pass/fail condition of a memory device Mar 29, 2016 Issued
Array ( [id] => 11925417 [patent_doc_number] => 09793002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Fuse element programming circuit and method' [patent_app_type] => utility [patent_app_number] => 15/073121 [patent_app_country] => US [patent_app_date] => 2016-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6968 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15073121 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/073121
Fuse element programming circuit and method Mar 16, 2016 Issued
Array ( [id] => 11652626 [patent_doc_number] => 20170148527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'IMPLEMENTING EFUSE VISUAL SECURITY OF STORED DATA USING EDRAM' [patent_app_type] => utility [patent_app_number] => 15/064543 [patent_app_country] => US [patent_app_date] => 2016-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3424 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15064543 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/064543
Implementing eFuse visual security of stored data using EDRAM Mar 7, 2016 Issued
Array ( [id] => 11473701 [patent_doc_number] => 20170060484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'MEMORY SYSTEM HAVING A SEMICONDUCTOR MEMORY DEVICE WITH PROTECTED BLOCKS' [patent_app_type] => utility [patent_app_number] => 15/051882 [patent_app_country] => US [patent_app_date] => 2016-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15051882 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/051882
Memory system having a semiconductor memory device with protected blocks Feb 23, 2016 Issued
Array ( [id] => 11272445 [patent_doc_number] => 20160334992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'SEMICONDUCTOR DEVICE THAT CHANGES A TARGET MEMORY UNIT BASED ON TEMPERATURE' [patent_app_type] => utility [patent_app_number] => 15/051221 [patent_app_country] => US [patent_app_date] => 2016-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8993 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15051221 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/051221
SEMICONDUCTOR DEVICE THAT CHANGES A TARGET MEMORY UNIT BASED ON TEMPERATURE Feb 22, 2016 Abandoned
Array ( [id] => 12108845 [patent_doc_number] => 09865332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-09 [patent_title] => 'Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers' [patent_app_type] => utility [patent_app_number] => 15/002207 [patent_app_country] => US [patent_app_date] => 2016-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10011 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15002207 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/002207
Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers Jan 19, 2016 Issued
Array ( [id] => 10787169 [patent_doc_number] => 20160133325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'LOW FORMING VOLTAGE NON-VOLATILE STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/996144 [patent_app_country] => US [patent_app_date] => 2016-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 26120 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14996144 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/996144
Low forming voltage non-volatile storage device Jan 13, 2016 Issued
Array ( [id] => 11731951 [patent_doc_number] => 20170193394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-06 [patent_title] => 'SYSTEMS AND METHODS TO RANK JOB CANDIDATES BASED ON MACHINE LEARNING MODEL' [patent_app_type] => utility [patent_app_number] => 14/987648 [patent_app_country] => US [patent_app_date] => 2016-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11233 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14987648 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/987648
Systems and methods to rank job candidates based on machine learning model Jan 3, 2016 Issued
Array ( [id] => 11732008 [patent_doc_number] => 20170193451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-06 [patent_title] => 'SYSTEMS AND METHODS TO MATCH JOB CANDIDATES AND JOB TITLES BASED ON MACHINE LEARNING MODEL' [patent_app_type] => utility [patent_app_number] => 14/987639 [patent_app_country] => US [patent_app_date] => 2016-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10960 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14987639 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/987639
Systems and methods to match job candidates and job titles based on machine learning model Jan 3, 2016 Issued
Array ( [id] => 13861783 [patent_doc_number] => 10192614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-29 [patent_title] => Adaptive read threshold voltage tracking with gap estimation between default read threshold voltages [patent_app_type] => utility [patent_app_number] => 14/962538 [patent_app_country] => US [patent_app_date] => 2015-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8108 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14962538 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/962538
Adaptive read threshold voltage tracking with gap estimation between default read threshold voltages Dec 7, 2015 Issued
Array ( [id] => 11110670 [patent_doc_number] => 20160307640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'METHOD AND DEVICE FOR PROGRAMMING MEMORY CELLS OF THE ONE-TIME-PROGRAMMABLE TYPE' [patent_app_type] => utility [patent_app_number] => 14/956963 [patent_app_country] => US [patent_app_date] => 2015-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3982 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14956963 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/956963
METHOD AND DEVICE FOR PROGRAMMING MEMORY CELLS OF THE ONE-TIME-PROGRAMMABLE TYPE Dec 1, 2015 Abandoned
Array ( [id] => 12195343 [patent_doc_number] => 09899078 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-20 [patent_title] => 'Resistive random access memory with high-reliability and manufacturing and control methods thereof' [patent_app_type] => utility [patent_app_number] => 14/950689 [patent_app_country] => US [patent_app_date] => 2015-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2509 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14950689 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/950689
Resistive random access memory with high-reliability and manufacturing and control methods thereof Nov 23, 2015 Issued
Array ( [id] => 11652602 [patent_doc_number] => 20170148503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'DYNAMIC RANDOM ACCESS MEMORY CIRCUIT AND VOLTAGE CONTROLLING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/949857 [patent_app_country] => US [patent_app_date] => 2015-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2730 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14949857 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/949857
DYNAMIC RANDOM ACCESS MEMORY CIRCUIT AND VOLTAGE CONTROLLING METHOD THEREOF Nov 22, 2015 Abandoned
Array ( [id] => 11307437 [patent_doc_number] => 09514841 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-06 [patent_title] => 'Implementing eFuse visual security of stored data using EDRAM' [patent_app_type] => utility [patent_app_number] => 14/948701 [patent_app_country] => US [patent_app_date] => 2015-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3408 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14948701 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/948701
Implementing eFuse visual security of stored data using EDRAM Nov 22, 2015 Issued
Array ( [id] => 11701563 [patent_doc_number] => 09691486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-27 [patent_title] => 'Data storage device and method of programming memory cells' [patent_app_type] => utility [patent_app_number] => 14/947567 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 17267 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14947567 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/947567
Data storage device and method of programming memory cells Nov 19, 2015 Issued
Array ( [id] => 10732787 [patent_doc_number] => 20160078936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'VARIABLE RESISTANCE MEMORY WITH LATTICE ARRAY USING ENCLOSING TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 14/940386 [patent_app_country] => US [patent_app_date] => 2015-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 7402 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14940386 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/940386
Variable resistance memory with lattice array using enclosing transistors Nov 12, 2015 Issued
Array ( [id] => 11607807 [patent_doc_number] => 20170125110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'ADAPTIVE READ THRESHOLD VOLTAGE TRACKING WITH SEPARATE CHARACTERIZATION ON EACH SIDE OF VOLTAGE DISTRIBUTION ABOUT DISTRIBUTION MEAN' [patent_app_type] => utility [patent_app_number] => 14/928181 [patent_app_country] => US [patent_app_date] => 2015-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8506 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14928181 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/928181
Adaptive read threshold voltage tracking with separate characterization on each side of voltage distribution about distribution mean Oct 29, 2015 Issued
Array ( [id] => 12108836 [patent_doc_number] => 09865324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-09 [patent_title] => 'Method and apparatus for decoding commands' [patent_app_type] => utility [patent_app_number] => 14/887217 [patent_app_country] => US [patent_app_date] => 2015-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7450 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14887217 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/887217
Method and apparatus for decoding commands Oct 18, 2015 Issued
Array ( [id] => 10690292 [patent_doc_number] => 20160036438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'NONVOLATILE MEMORY DEVICES WITH ON DIE TERMINATION CIRCUITS AND CONTROL METHODS THEREOF' [patent_app_type] => utility [patent_app_number] => 14/882714 [patent_app_country] => US [patent_app_date] => 2015-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10424 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14882714 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/882714
Nonvolatile memory devices with on die termination circuits and control methods thereof Oct 13, 2015 Issued
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