
Jung H. Hur
Examiner (ID: 19047, Phone: (571)272-1870 , Office: P/2824 )
| Most Active Art Unit | 2824 |
| Art Unit(s) | 2824 |
| Total Applications | 1179 |
| Issued Applications | 1001 |
| Pending Applications | 12 |
| Abandoned Applications | 169 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5379857
[patent_doc_number] => 20090191696
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-30
[patent_title] => 'METHOD FOR INCREASING THE PENETRATION DEPTH OF MATERIAL INFUSION IN A SUBSTRATE USING A GAS CLUSTER ION BEAM'
[patent_app_type] => utility
[patent_app_number] => 12/020094
[patent_app_country] => US
[patent_app_date] => 2008-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9220
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0191/20090191696.pdf
[firstpage_image] =>[orig_patent_app_number] => 12020094
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/020094 | Method for increasing the penetration depth of material infusion in a substrate using a gas cluster ion beam | Jan 24, 2008 | Issued |
Array
(
[id] => 4859731
[patent_doc_number] => 20080268581
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-30
[patent_title] => 'Method of manufacturing thin film transistor substrate'
[patent_app_type] => utility
[patent_app_number] => 12/009253
[patent_app_country] => US
[patent_app_date] => 2008-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 6694
[patent_no_of_claims] => 13
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0268/20080268581.pdf
[firstpage_image] =>[orig_patent_app_number] => 12009253
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/009253 | Method of manufacturing thin film transistor substrate | Jan 15, 2008 | Issued |
Array
(
[id] => 4900602
[patent_doc_number] => 20080110013
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-15
[patent_title] => 'METHOD OF SEALING OR WELDING TWO ELEMENTS TO ONE ANOTHER'
[patent_app_type] => utility
[patent_app_number] => 12/013624
[patent_app_country] => US
[patent_app_date] => 2008-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3059
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0110/20080110013.pdf
[firstpage_image] =>[orig_patent_app_number] => 12013624
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/013624 | Method of sealing or welding two elements to one another | Jan 13, 2008 | Issued |
Array
(
[id] => 101966
[patent_doc_number] => 07727818
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-01
[patent_title] => 'Substrate process for an embedded component'
[patent_app_type] => utility
[patent_app_number] => 11/972633
[patent_app_country] => US
[patent_app_date] => 2008-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 1974
[patent_no_of_claims] => 14
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/727/07727818.pdf
[firstpage_image] =>[orig_patent_app_number] => 11972633
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/972633 | Substrate process for an embedded component | Jan 10, 2008 | Issued |
Array
(
[id] => 4634382
[patent_doc_number] => 08012832
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-09-06
[patent_title] => 'Process for manufacturing a multi-drain electronic power device integrated in semiconductor substrate and corresponding device'
[patent_app_type] => utility
[patent_app_number] => 11/971163
[patent_app_country] => US
[patent_app_date] => 2008-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 6447
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/012/08012832.pdf
[firstpage_image] =>[orig_patent_app_number] => 11971163
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/971163 | Process for manufacturing a multi-drain electronic power device integrated in semiconductor substrate and corresponding device | Jan 7, 2008 | Issued |
Array
(
[id] => 7530352
[patent_doc_number] => 07842574
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-30
[patent_title] => 'Method of manufacturing a semiconductor power device'
[patent_app_type] => utility
[patent_app_number] => 11/971114
[patent_app_country] => US
[patent_app_date] => 2008-01-08
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/842/07842574.pdf
[firstpage_image] =>[orig_patent_app_number] => 11971114
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/971114 | Method of manufacturing a semiconductor power device | Jan 7, 2008 | Issued |
Array
(
[id] => 4925154
[patent_doc_number] => 20080164517
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-10
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/968403
[patent_app_country] => US
[patent_app_date] => 2008-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3196
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20080164517.pdf
[firstpage_image] =>[orig_patent_app_number] => 11968403
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/968403 | Semiconductor device and method for making the same | Jan 1, 2008 | Issued |
Array
(
[id] => 5432280
[patent_doc_number] => 20090166866
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-02
[patent_title] => 'CONTACT METALLIZATION FOR SEMICONDUCTOR DEVICES'
[patent_app_type] => utility
[patent_app_number] => 11/968134
[patent_app_country] => US
[patent_app_date] => 2007-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2309
[patent_no_of_claims] => 15
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[pdf_file] => publications/A1/0166/20090166866.pdf
[firstpage_image] =>[orig_patent_app_number] => 11968134
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/968134 | CONTACT METALLIZATION FOR SEMICONDUCTOR DEVICES | Dec 30, 2007 | Abandoned |
Array
(
[id] => 5293695
[patent_doc_number] => 20090008621
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-08
[patent_title] => 'PHASE-CHANGE MEMORY ELEMENT'
[patent_app_type] => utility
[patent_app_number] => 11/966584
[patent_app_country] => US
[patent_app_date] => 2007-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 3007
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[pdf_file] => publications/A1/0008/20090008621.pdf
[firstpage_image] =>[orig_patent_app_number] => 11966584
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/966584 | PHASE-CHANGE MEMORY ELEMENT | Dec 27, 2007 | Abandoned |
Array
(
[id] => 5432039
[patent_doc_number] => 20090166625
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-02
[patent_title] => 'MOS DEVICE STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 11/966734
[patent_app_country] => US
[patent_app_date] => 2007-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => publications/A1/0166/20090166625.pdf
[firstpage_image] =>[orig_patent_app_number] => 11966734
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/966734 | MOS DEVICE STRUCTURE | Dec 27, 2007 | Abandoned |
Array
(
[id] => 4715205
[patent_doc_number] => 20080237727
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-02
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/965563
[patent_app_country] => US
[patent_app_date] => 2007-12-27
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[pdf_file] => publications/A1/0237/20080237727.pdf
[firstpage_image] =>[orig_patent_app_number] => 11965563
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/965563 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE | Dec 26, 2007 | Abandoned |
Array
(
[id] => 5435671
[patent_doc_number] => 20090170258
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-02
[patent_title] => 'METHODS FOR FULL GATE SILICIDATION OF METAL GATE STRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 11/965024
[patent_app_country] => US
[patent_app_date] => 2007-12-27
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[pdf_file] => publications/A1/0170/20090170258.pdf
[firstpage_image] =>[orig_patent_app_number] => 11965024
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/965024 | Methods for full gate silicidation of metal gate structures | Dec 26, 2007 | Issued |
Array
(
[id] => 5401330
[patent_doc_number] => 20090236643
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-09-24
[patent_title] => 'CMOS IMAGE SENSOR AND METHOD OF MANUFACTURING'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/964474 | CMOS IMAGE SENSOR AND METHOD OF MANUFACTURING | Dec 25, 2007 | Abandoned |
Array
(
[id] => 4856480
[patent_doc_number] => 20080265330
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-30
[patent_title] => 'TECHNIQUE FOR ENHANCING TRANSISTOR PERFORMANCE BY TRANSISTOR SPECIFIC CONTACT DESIGN'
[patent_app_type] => utility
[patent_app_number] => 11/964494
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 11964494
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/964494 | Technique for enhancing transistor performance by transistor specific contact design | Dec 25, 2007 | Issued |
Array
(
[id] => 5432155
[patent_doc_number] => 20090166741
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-02
[patent_title] => 'REDUCING EXTERNAL RESISTANCE OF A MULTI-GATE DEVICE USING SPACER PROCESSING TECHNIQUES'
[patent_app_type] => utility
[patent_app_number] => 11/964593
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/964593 | Reducing external resistance of a multi-gate device using spacer processing techniques | Dec 25, 2007 | Issued |
Array
(
[id] => 159171
[patent_doc_number] => 07674668
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-09
[patent_title] => 'Method of manufacturing a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/005444
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/005444 | Method of manufacturing a semiconductor device | Dec 25, 2007 | Issued |
Array
(
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[patent_title] => 'Method of manufacturing pins of miniaturization chip module'
[patent_app_type] => utility
[patent_app_number] => 12/003254
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Array
(
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[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/962524 | METHOD OF FORMING METAL WIRE IN SEMICONDUCTOR DEVICE | Dec 20, 2007 | Abandoned |
Array
(
[id] => 33117
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[patent_issue_date] => 2010-08-31
[patent_title] => 'Method to detect poly residues in LOCOS process'
[patent_app_type] => utility
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[firstpage_image] =>[orig_patent_app_number] => 11954773
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/954773 | Method to detect poly residues in LOCOS process | Dec 11, 2007 | Issued |
Array
(
[id] => 4749162
[patent_doc_number] => 20080157233
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[patent_kind] => A1
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[patent_title] => 'Method for fabricating a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/987863
[patent_app_country] => US
[patent_app_date] => 2007-12-05
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11987863
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/987863 | Method for fabricating a semiconductor device | Dec 4, 2007 | Abandoned |