Search

Jung H. Hur

Examiner (ID: 2843, Phone: (571)272-1870 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
1178
Issued Applications
1001
Pending Applications
11
Abandoned Applications
169

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19509525 [patent_doc_number] => 12120967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Phase-change memory including phase-change elements in series with respective heater elements and methods for manufacturing, programming, and reading thereof [patent_app_type] => utility [patent_app_number] => 17/644942 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4970 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17644942 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/644942
Phase-change memory including phase-change elements in series with respective heater elements and methods for manufacturing, programming, and reading thereof Dec 16, 2021 Issued
Array ( [id] => 18439705 [patent_doc_number] => 20230187000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => NON-VOLATILE MEMORY WITH DATA REFRESH [patent_app_type] => utility [patent_app_number] => 17/549431 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19288 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17549431 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/549431
Non-volatile memory with data refresh based on data states of adjacent memory cells Dec 12, 2021 Issued
Array ( [id] => 19046472 [patent_doc_number] => 11935591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Voltage applications to a memory cell including a resistance change memory element in series with a two-terminal switching element [patent_app_type] => utility [patent_app_number] => 17/549337 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 8191 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17549337 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/549337
Voltage applications to a memory cell including a resistance change memory element in series with a two-terminal switching element Dec 12, 2021 Issued
Array ( [id] => 18607896 [patent_doc_number] => 11749372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Memory device having reference memory array structure resembling data memory array structure, and methods of operating the same [patent_app_type] => utility [patent_app_number] => 17/547240 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8791 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17547240 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/547240
Memory device having reference memory array structure resembling data memory array structure, and methods of operating the same Dec 9, 2021 Issued
Array ( [id] => 17676356 [patent_doc_number] => 20220189523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => MEMORY CELL, DEVICE AND METHOD FOR WRITING TO A MEMORY CELL [patent_app_type] => utility [patent_app_number] => 17/546553 [patent_app_country] => US [patent_app_date] => 2021-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9917 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17546553 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/546553
Memory cell including a spin-orbit-torque (SOT) layer and magnetic tunnel junction (MTJ) layer stacks and writing method therefor Dec 8, 2021 Issued
Array ( [id] => 19858043 [patent_doc_number] => 12260893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Semiconductor memory module and device having power management unit for supplying stable and accurate voltages to DRAM chip array [patent_app_type] => utility [patent_app_number] => 18/010402 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4570 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18010402 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/010402
Semiconductor memory module and device having power management unit for supplying stable and accurate voltages to DRAM chip array Nov 21, 2021 Issued
Array ( [id] => 17948982 [patent_doc_number] => 20220336001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => SEMICONDUCTOR DEVICE PERFORMING A MULTIPLICATION AND ACCUMULATION OPERATION [patent_app_type] => utility [patent_app_number] => 17/524447 [patent_app_country] => US [patent_app_date] => 2021-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17524447 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/524447
Semiconductor device including a memory array performing a multiplication and accumulation (MAC) operation using capacitors Nov 10, 2021 Issued
Array ( [id] => 18688135 [patent_doc_number] => 11783878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Time division multiplexing (TDM) based optical ternary content addressable memory (TCAM) [patent_app_type] => utility [patent_app_number] => 17/453585 [patent_app_country] => US [patent_app_date] => 2021-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 16639 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17453585 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/453585
Time division multiplexing (TDM) based optical ternary content addressable memory (TCAM) Nov 3, 2021 Issued
Array ( [id] => 17431440 [patent_doc_number] => 20220059149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => MEMORY CIRCUIT DEVICE AND METHOD FOR USING SAME [patent_app_type] => utility [patent_app_number] => 17/518446 [patent_app_country] => US [patent_app_date] => 2021-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17518446 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/518446
Memory circuit device including a selection circuit unit shared by a write circuit unit and a read circuit unit Nov 2, 2021 Issued
Array ( [id] => 17752472 [patent_doc_number] => 20220230677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => SELF-REFRESH FREQUENCY DETECTION METHOD [patent_app_type] => utility [patent_app_number] => 17/504875 [patent_app_country] => US [patent_app_date] => 2021-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504875 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/504875
SELF-REFRESH FREQUENCY DETECTION METHOD Oct 18, 2021 Abandoned
Array ( [id] => 17737736 [patent_doc_number] => 20220223198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => DRIVE CIRCUIT AND MEMORY COMPRISING THE SAME [patent_app_type] => utility [patent_app_number] => 17/498794 [patent_app_country] => US [patent_app_date] => 2021-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17498794 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/498794
Drive circuit with adjustable pull-up resistor, and memory comprising the same Oct 11, 2021 Issued
Array ( [id] => 17566291 [patent_doc_number] => 20220130440 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => MEMORY [patent_app_type] => utility [patent_app_number] => 17/448891 [patent_app_country] => US [patent_app_date] => 2021-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17448891 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/448891
Memory including clock generation circuit and duty cycle adjustment Sep 25, 2021 Issued
Array ( [id] => 18256472 [patent_doc_number] => 20230083511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => HIDDEN WRITES IN A RESISTIVE MEMORY [patent_app_type] => utility [patent_app_number] => 17/447746 [patent_app_country] => US [patent_app_date] => 2021-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447746 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/447746
Hidden writes in a resistive memory Sep 14, 2021 Issued
Array ( [id] => 17809790 [patent_doc_number] => 20220261625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => PROCESSING DEVICE BASED ON MAGNETIC TUNNEL JUNCTION (MTJ) ELEMENT AND ELECTRONIC SYSTEM INCLUDING THE PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 17/474466 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13608 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17474466 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/474466
Processing device based on magnetic tunnel junction (MTJ) element and electronic system including the processing device Sep 13, 2021 Issued
Array ( [id] => 19168248 [patent_doc_number] => 11984159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Nonvolatile memory apparatus for mitigating read disturbance and system using the same [patent_app_type] => utility [patent_app_number] => 17/472179 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 15438 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17472179 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/472179
Nonvolatile memory apparatus for mitigating read disturbance and system using the same Sep 9, 2021 Issued
Array ( [id] => 17295155 [patent_doc_number] => 20210390994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => MEMORY AND ACCESS METHOD [patent_app_type] => utility [patent_app_number] => 17/412904 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12859 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17412904 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/412904
MEMORY AND ACCESS METHOD Aug 25, 2021 Abandoned
Array ( [id] => 17302734 [patent_doc_number] => 20210398573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => MEMORY AND CALIBRATION AND OPERATION METHODS THEREOF FOR READING DATA IN MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/410046 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11301 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/410046
Memory and calibration and operation methods thereof for reading data in memory cells Aug 23, 2021 Issued
Array ( [id] => 17217505 [patent_doc_number] => 20210350843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => REFRESH RATE CONTROL FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/384013 [patent_app_country] => US [patent_app_date] => 2021-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17384013 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/384013
REFRESH RATE CONTROL FOR A MEMORY DEVICE Jul 22, 2021 Abandoned
Array ( [id] => 18387082 [patent_doc_number] => 11657871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Memristive device and method based on ion migration over one or more nanowires [patent_app_type] => utility [patent_app_number] => 17/375813 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 9243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 439 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375813 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375813
Memristive device and method based on ion migration over one or more nanowires Jul 13, 2021 Issued
Array ( [id] => 18520629 [patent_doc_number] => 11710523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Apparatus for discharging control gates after performing a sensing operation on a memory cell [patent_app_type] => utility [patent_app_number] => 17/371482 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 9469 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 329 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17371482 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/371482
Apparatus for discharging control gates after performing a sensing operation on a memory cell Jul 8, 2021 Issued
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