Search

Jung H. Kim

Examiner (ID: 17214, Phone: (571)270-7964 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2842, 2816, 2504, 2836
Total Applications
1884
Issued Applications
1638
Pending Applications
127
Abandoned Applications
155

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20312545 [patent_doc_number] => 20250330174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-23 [patent_title] => DRIVER CIRCUIT AND METHOD FOR SUPPLYING LIMITED CURRENT TO A LOAD [patent_app_type] => utility [patent_app_number] => 18/644061 [patent_app_country] => US [patent_app_date] => 2024-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2052 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644061 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/644061
Driver circuit and method for supplying limited current to a load Apr 22, 2024 Issued
Array ( [id] => 20581690 [patent_doc_number] => 12573948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-10 [patent_title] => Integrated inverting/non-inverting recuperating high-voltage-conversion-ratio capacitive load driver [patent_app_type] => utility [patent_app_number] => 18/640572 [patent_app_country] => US [patent_app_date] => 2024-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4155 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18640572 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/640572
Integrated inverting/non-inverting recuperating high-voltage-conversion-ratio capacitive load driver Apr 18, 2024 Issued
Array ( [id] => 20502319 [patent_doc_number] => 20260031782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => FILTER CIRCUIT, FILTER, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/996909 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18996909 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/996909
FILTER CIRCUIT, FILTER, AND ELECTRONIC DEVICE Apr 15, 2024 Pending
Array ( [id] => 20284633 [patent_doc_number] => 20250309875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => POWER-EFFICIENT CLOCK BUFFERS [patent_app_type] => utility [patent_app_number] => 18/618657 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8173 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618657 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/618657
POWER-EFFICIENT CLOCK BUFFERS Mar 26, 2024 Pending
Array ( [id] => 19590732 [patent_doc_number] => 20240388289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => RF SWITCH STACK WITH CHARGE REDISTRIBUTION [patent_app_type] => utility [patent_app_number] => 18/615523 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615523 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/615523
RF switch stack with charge redistribution Mar 24, 2024 Issued
Array ( [id] => 19468208 [patent_doc_number] => 20240321878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => Reference Voltage Circuit [patent_app_type] => utility [patent_app_number] => 18/614096 [patent_app_country] => US [patent_app_date] => 2024-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4668 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 370 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614096 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614096
Reference voltage circuit Mar 21, 2024 Issued
Array ( [id] => 20251749 [patent_doc_number] => 20250300618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => OFFSET VOLTAGE CANCELATION FOR A CHARGE AMPLIFICATION CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/611889 [patent_app_country] => US [patent_app_date] => 2024-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1228 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18611889 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/611889
Offset voltage cancelation for a charge amplification circuit Mar 20, 2024 Issued
Array ( [id] => 20236364 [patent_doc_number] => 20250293683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => FILTER WITH LOW LEAKAGE POWER-DOWN SWITCHES [patent_app_type] => utility [patent_app_number] => 18/606645 [patent_app_country] => US [patent_app_date] => 2024-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18606645 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/606645
Filter with low leakage power-down switches Mar 14, 2024 Issued
Array ( [id] => 19469144 [patent_doc_number] => 20240322814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => BUFFER CIRCUIT FOR DRIVING A GAN POWER SWITCH AND CORRESPONDING DRIVER CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/604239 [patent_app_country] => US [patent_app_date] => 2024-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604239 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604239
Buffer circuit for driving a GAN power switch and corresponding driver circuit Mar 12, 2024 Issued
Array ( [id] => 20508256 [patent_doc_number] => 12542539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Switchable termination resistance circuit [patent_app_type] => utility [patent_app_number] => 18/596824 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18596824 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/596824
Switchable termination resistance circuit Mar 5, 2024 Issued
Array ( [id] => 20806484 [patent_doc_number] => 12671399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-30 [patent_title] => Constant power active discharge of energy storage circuit [patent_app_type] => utility [patent_app_number] => 18/591835 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2376 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18591835 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/591835
Constant power active discharge of energy storage circuit Feb 28, 2024 Issued
Array ( [id] => 20441982 [patent_doc_number] => 12512824 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Delay chain circuit and electronic device [patent_app_type] => utility [patent_app_number] => 18/586575 [patent_app_country] => US [patent_app_date] => 2024-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4990 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18586575 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/586575
Delay chain circuit and electronic device Feb 25, 2024 Issued
Array ( [id] => 20197412 [patent_doc_number] => 20250274122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => INPUT BUFFER CIRCUIT HAVING VARIABLE THRESHOLD CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/587077 [patent_app_country] => US [patent_app_date] => 2024-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18587077 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/587077
Input buffer circuit having variable threshold circuits Feb 25, 2024 Issued
Array ( [id] => 19935594 [patent_doc_number] => 12308804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Systems and methods for driving semiconductor devices and sensing device parameters [patent_app_type] => utility [patent_app_number] => 18/440255 [patent_app_country] => US [patent_app_date] => 2024-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4727 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18440255 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/440255
Systems and methods for driving semiconductor devices and sensing device parameters Feb 12, 2024 Issued
Array ( [id] => 20483080 [patent_doc_number] => 12531557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => High-efficiency high-swing Voltage Mode Logic driver systems and methods [patent_app_type] => utility [patent_app_number] => 18/439756 [patent_app_country] => US [patent_app_date] => 2024-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439756 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/439756
High-efficiency high-swing Voltage Mode Logic driver systems and methods Feb 11, 2024 Issued
Array ( [id] => 19222294 [patent_doc_number] => 20240186998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => GATE DRIVER DEVICE HAVING A DRIVER CIRCUIT FOR SUPPLYING A BACKGATE DRIVE SIGNAL [patent_app_type] => utility [patent_app_number] => 18/439174 [patent_app_country] => US [patent_app_date] => 2024-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439174 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/439174
Gate driver device having a driver circuit for supplying a backgate drive signal Feb 11, 2024 Issued
Array ( [id] => 20690818 [patent_doc_number] => 12620980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-05 [patent_title] => Multi-modulus divider [patent_app_type] => utility [patent_app_number] => 18/437020 [patent_app_country] => US [patent_app_date] => 2024-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3348 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18437020 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/437020
Multi-modulus divider Feb 7, 2024 Issued
Array ( [id] => 20153997 [patent_doc_number] => 20250253835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => COMMON MODE TERMINATION MATCHING METHOD FOR DIGITAL COMMUNICATIONS [patent_app_type] => utility [patent_app_number] => 18/434480 [patent_app_country] => US [patent_app_date] => 2024-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18434480 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/434480
Common mode termination matching method for digital communications Feb 5, 2024 Issued
Array ( [id] => 20145100 [patent_doc_number] => 12379441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Circuit assembly for correction of an input signal, use of the circuit assembly for detection of a physiological signal in a magnetic resonance (MR) system [patent_app_type] => utility [patent_app_number] => 18/432246 [patent_app_country] => US [patent_app_date] => 2024-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 0 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18432246 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/432246
Circuit assembly for correction of an input signal, use of the circuit assembly for detection of a physiological signal in a magnetic resonance (MR) system Feb 4, 2024 Issued
Array ( [id] => 19727659 [patent_doc_number] => 20250030410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => INTEGRATED CIRCUIT WITH SHMOO DELAY CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/429773 [patent_app_country] => US [patent_app_date] => 2024-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8430 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18429773 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/429773
Integrated circuit with shmoo delay circuit Jan 31, 2024 Issued
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