Search

Junghwa M. Im

Examiner (ID: 14719)

Most Active Art Unit
2811
Art Unit(s)
2811
Total Applications
529
Issued Applications
282
Pending Applications
10
Abandoned Applications
237

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7607204 [patent_doc_number] => 07098512 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-29 [patent_title] => 'Layout patterns for deep well region to facilitate routing body-bias voltage' [patent_app_type] => utility [patent_app_number] => 10/683732 [patent_app_country] => US [patent_app_date] => 2003-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7243 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/098/07098512.pdf [firstpage_image] =>[orig_patent_app_number] => 10683732 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/683732
Layout patterns for deep well region to facilitate routing body-bias voltage Oct 9, 2003 Issued
Array ( [id] => 7220607 [patent_doc_number] => 20050077620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-14 [patent_title] => 'Miniaturized small memory card structure' [patent_app_type] => utility [patent_app_number] => 10/683835 [patent_app_country] => US [patent_app_date] => 2003-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1255 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20050077620.pdf [firstpage_image] =>[orig_patent_app_number] => 10683835 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/683835
Miniaturized small memory card structure Oct 8, 2003 Abandoned
Array ( [id] => 7278831 [patent_doc_number] => 20040061208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Semiconductor package assembly and method for electrically isolating modules' [patent_app_type] => new [patent_app_number] => 10/675965 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2721 [patent_no_of_claims] => 89 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20040061208.pdf [firstpage_image] =>[orig_patent_app_number] => 10675965 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/675965
Semiconductor package assembly and method for electrically isolating modules Sep 29, 2003 Issued
Array ( [id] => 7371820 [patent_doc_number] => 20040080013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-29 [patent_title] => 'Chip-stack semiconductor device and manufacturing method of the same' [patent_app_type] => new [patent_app_number] => 10/670194 [patent_app_country] => US [patent_app_date] => 2003-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 10140 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20040080013.pdf [firstpage_image] =>[orig_patent_app_number] => 10670194 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/670194
Chip-stack semiconductor device and manufacturing method of the same Sep 25, 2003 Abandoned
Array ( [id] => 7278829 [patent_doc_number] => 20040061206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Discrete package having insulated ceramic heat sink' [patent_app_type] => new [patent_app_number] => 10/672346 [patent_app_country] => US [patent_app_date] => 2003-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3115 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20040061206.pdf [firstpage_image] =>[orig_patent_app_number] => 10672346 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/672346
Discrete package having insulated ceramic heat sink Sep 25, 2003 Abandoned
Array ( [id] => 7008436 [patent_doc_number] => 20050062152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Window ball grid array semiconductor package with substrate having opening and mehtod for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/671176 [patent_app_country] => US [patent_app_date] => 2003-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5420 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20050062152.pdf [firstpage_image] =>[orig_patent_app_number] => 10671176 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/671176
Window ball grid array semiconductor package with substrate having opening and mehtod for fabricating the same Sep 23, 2003 Abandoned
Array ( [id] => 873339 [patent_doc_number] => 07361992 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-22 [patent_title] => 'Semiconductor device including interconnects formed by damascene process and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/664875 [patent_app_country] => US [patent_app_date] => 2003-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 5297 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/361/07361992.pdf [firstpage_image] =>[orig_patent_app_number] => 10664875 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/664875
Semiconductor device including interconnects formed by damascene process and manufacturing method thereof Sep 21, 2003 Issued
Array ( [id] => 419126 [patent_doc_number] => 07276801 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-02 [patent_title] => 'Designs and methods for conductive bumps' [patent_app_type] => utility [patent_app_number] => 10/668986 [patent_app_country] => US [patent_app_date] => 2003-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4086 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/276/07276801.pdf [firstpage_image] =>[orig_patent_app_number] => 10668986 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/668986
Designs and methods for conductive bumps Sep 21, 2003 Issued
Array ( [id] => 7267752 [patent_doc_number] => 20040056270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Memory system capable of operating at high temperatures and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/666972 [patent_app_country] => US [patent_app_date] => 2003-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3913 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20040056270.pdf [firstpage_image] =>[orig_patent_app_number] => 10666972 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/666972
Memory system capable of operating at high temperatures and method for fabricating the same Sep 18, 2003 Issued
Array ( [id] => 457645 [patent_doc_number] => 07245007 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-07-17 [patent_title] => 'Exposed lead interposer leadframe package' [patent_app_type] => utility [patent_app_number] => 10/667226 [patent_app_country] => US [patent_app_date] => 2003-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 34 [patent_no_of_words] => 9041 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/245/07245007.pdf [firstpage_image] =>[orig_patent_app_number] => 10667226 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/667226
Exposed lead interposer leadframe package Sep 17, 2003 Issued
Array ( [id] => 7457071 [patent_doc_number] => 20040119146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument' [patent_app_type] => new [patent_app_number] => 10/664585 [patent_app_country] => US [patent_app_date] => 2003-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4150 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20040119146.pdf [firstpage_image] =>[orig_patent_app_number] => 10664585 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/664585
Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument Sep 16, 2003 Abandoned
Array ( [id] => 7457282 [patent_doc_number] => 20040119171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => '[FLIP-CHIP SUBSTRATE AND FLIP-CHIP BONDING PROCESS THEREOF]' [patent_app_type] => new [patent_app_number] => 10/605215 [patent_app_country] => US [patent_app_date] => 2003-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2810 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20040119171.pdf [firstpage_image] =>[orig_patent_app_number] => 10605215 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/605215
[FLIP-CHIP SUBSTRATE AND FLIP-CHIP BONDING PROCESS THEREOF] Sep 15, 2003 Abandoned
Array ( [id] => 7343372 [patent_doc_number] => 20040046246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'Press-fit package diode' [patent_app_type] => new [patent_app_number] => 10/657875 [patent_app_country] => US [patent_app_date] => 2003-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2085 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20040046246.pdf [firstpage_image] =>[orig_patent_app_number] => 10657875 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/657875
Press-fit package diode Sep 8, 2003 Abandoned
Array ( [id] => 7445925 [patent_doc_number] => 20040051169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Lead-bond type chip package and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/655296 [patent_app_country] => US [patent_app_date] => 2003-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3758 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20040051169.pdf [firstpage_image] =>[orig_patent_app_number] => 10655296 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/655296
Lead-bond type chip package and manufacturing method thereof Sep 4, 2003 Issued
Array ( [id] => 7250214 [patent_doc_number] => 20040238924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'Semiconductor package' [patent_app_type] => new [patent_app_number] => 10/654846 [patent_app_country] => US [patent_app_date] => 2003-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2511 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20040238924.pdf [firstpage_image] =>[orig_patent_app_number] => 10654846 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/654846
Semiconductor package Sep 3, 2003 Abandoned
Array ( [id] => 759344 [patent_doc_number] => 07015559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-21 [patent_title] => 'Method and system for electrically coupling a chip to chip package' [patent_app_type] => utility [patent_app_number] => 10/652066 [patent_app_country] => US [patent_app_date] => 2003-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3097 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/015/07015559.pdf [firstpage_image] =>[orig_patent_app_number] => 10652066 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/652066
Method and system for electrically coupling a chip to chip package Aug 28, 2003 Issued
Array ( [id] => 7135041 [patent_doc_number] => 20040043515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Universal semiconductor housing with precrosslinked plastic embedding compounds, and method of producing the semiconductor housing' [patent_app_type] => new [patent_app_number] => 10/651856 [patent_app_country] => US [patent_app_date] => 2003-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8242 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20040043515.pdf [firstpage_image] =>[orig_patent_app_number] => 10651856 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/651856
Universal semiconductor housing with precrosslinked plastic embedding compounds, and method of producing the semiconductor housing Aug 28, 2003 Abandoned
Array ( [id] => 664117 [patent_doc_number] => 07102209 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-09-05 [patent_title] => 'Substrate for use in semiconductor manufacturing and method of making same' [patent_app_type] => utility [patent_app_number] => 10/650325 [patent_app_country] => US [patent_app_date] => 2003-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3485 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/102/07102209.pdf [firstpage_image] =>[orig_patent_app_number] => 10650325 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/650325
Substrate for use in semiconductor manufacturing and method of making same Aug 26, 2003 Issued
Array ( [id] => 7459528 [patent_doc_number] => 20040094831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Semiconductor device, method for manufacturing semiconductor device and electronic equipment' [patent_app_type] => new [patent_app_number] => 10/647075 [patent_app_country] => US [patent_app_date] => 2003-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4530 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20040094831.pdf [firstpage_image] =>[orig_patent_app_number] => 10647075 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/647075
Semiconductor device, method for manufacturing semiconductor device and electronic equipment Aug 20, 2003 Issued
Array ( [id] => 1040574 [patent_doc_number] => 06869872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-22 [patent_title] => 'Method of manufacturing a semiconductor memory device having a metal contact structure' [patent_app_type] => utility [patent_app_number] => 10/635378 [patent_app_country] => US [patent_app_date] => 2003-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 2906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/869/06869872.pdf [firstpage_image] =>[orig_patent_app_number] => 10635378 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/635378
Method of manufacturing a semiconductor memory device having a metal contact structure Aug 5, 2003 Issued
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