Search

Justin R. Knapp

Examiner (ID: 122, Phone: (571)270-3008 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2182, 2112, 2183
Total Applications
856
Issued Applications
683
Pending Applications
69
Abandoned Applications
122

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20020516 [patent_doc_number] => 20250158738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => CHARACTERIZING AND MARGINING MULTI-VOLTAGE SIGNAL ENCODING FOR INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 18/920362 [patent_app_country] => US [patent_app_date] => 2024-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13853 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18920362 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/920362
CHARACTERIZING AND MARGINING MULTI-VOLTAGE SIGNAL ENCODING FOR INTERCONNECTS Oct 17, 2024 Pending
Array ( [id] => 19725846 [patent_doc_number] => 20250028597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => DETECTING DATA BUS DRIVE FAULTS [patent_app_type] => utility [patent_app_number] => 18/904612 [patent_app_country] => US [patent_app_date] => 2024-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15318 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18904612 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/904612
Detecting data bus drive faults Oct 1, 2024 Issued
Array ( [id] => 20036071 [patent_doc_number] => 20250174293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => CLOCK CONVERSION DEVICE, TEST SYSTEM INCLUDING THEREOF AND METHOD OF OPERATING THE TEST SYSTEM [patent_app_type] => utility [patent_app_number] => 18/898855 [patent_app_country] => US [patent_app_date] => 2024-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1252 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18898855 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/898855
CLOCK CONVERSION DEVICE, TEST SYSTEM INCLUDING THEREOF AND METHOD OF OPERATING THE TEST SYSTEM Sep 26, 2024 Pending
Array ( [id] => 19694990 [patent_doc_number] => 20250013535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => Data Writing Method and Processing System [patent_app_type] => utility [patent_app_number] => 18/891094 [patent_app_country] => US [patent_app_date] => 2024-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16144 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18891094 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/891094
Data Writing Method and Processing System Sep 19, 2024 Pending
Array ( [id] => 19891945 [patent_doc_number] => 20250117257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => ACCELERATOR DEVICE AND METHOD OF CONTROLLING ACCELERATOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/830998 [patent_app_country] => US [patent_app_date] => 2024-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18830998 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/830998
ACCELERATOR DEVICE AND METHOD OF CONTROLLING ACCELERATOR DEVICE Sep 10, 2024 Pending
Array ( [id] => 19645023 [patent_doc_number] => 20240419543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => PROXIMITY BASED PARITY DATA MANAGEMENT [patent_app_type] => utility [patent_app_number] => 18/821484 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10748 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821484 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/821484
PROXIMITY BASED PARITY DATA MANAGEMENT Aug 29, 2024 Pending
Array ( [id] => 19645013 [patent_doc_number] => 20240419533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => SERVER-SIDE REMEDIATION FOR INCOMING SENSOR DATA [patent_app_type] => utility [patent_app_number] => 18/819016 [patent_app_country] => US [patent_app_date] => 2024-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18819016 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/819016
Server-side remediation for incoming sensor data Aug 28, 2024 Issued
Array ( [id] => 19689099 [patent_doc_number] => 20250007644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => RECEIVING METHOD WITH ERROR CORRECTION CODING WITH GENERATED DUMMY DATA [patent_app_type] => utility [patent_app_number] => 18/814106 [patent_app_country] => US [patent_app_date] => 2024-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 48778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18814106 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/814106
RECEIVING METHOD WITH ERROR CORRECTION CODING WITH GENERATED DUMMY DATA Aug 22, 2024 Pending
Array ( [id] => 20556889 [patent_doc_number] => 20260056673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-26 [patent_title] => Method and System for In-NAND Checksum Calculating for Scrambled NAND Data [patent_app_type] => utility [patent_app_number] => 18/810382 [patent_app_country] => US [patent_app_date] => 2024-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3392 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18810382 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/810382
Method and System for In-NAND Checksum Calculating for Scrambled NAND Data Aug 19, 2024 Pending
Array ( [id] => 20168373 [patent_doc_number] => 20250260420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-14 [patent_title] => NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/807802 [patent_app_country] => US [patent_app_date] => 2024-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18807802 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/807802
Memory system and nonvolatile memory device capable of compressing data from a memory plane and outputting data in parallel Aug 15, 2024 Issued
Array ( [id] => 20791777 [patent_doc_number] => 12665700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-23 [patent_title] => Joint polar encoding of multiple payloads with unequal error protection [patent_app_type] => utility [patent_app_number] => 18/786141 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 24593 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 349 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18786141 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/786141
Joint polar encoding of multiple payloads with unequal error protection Jul 25, 2024 Issued
Array ( [id] => 20747274 [patent_doc_number] => 12647204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-02 [patent_title] => Method, apparatus, and system for improving reliability of data transmission involving an ethernet device [patent_app_type] => utility [patent_app_number] => 18/775927 [patent_app_country] => US [patent_app_date] => 2024-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 42 [patent_no_of_words] => 37867 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18775927 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/775927
Method, apparatus, and system for improving reliability of data transmission involving an ethernet device Jul 16, 2024 Issued
Array ( [id] => 19558588 [patent_doc_number] => 20240370380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A VICTIM CACHE [patent_app_type] => utility [patent_app_number] => 18/775300 [patent_app_country] => US [patent_app_date] => 2024-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 95369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18775300 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/775300
Methods and apparatus to facilitate read-modify-write support in a victim cache Jul 16, 2024 Issued
Array ( [id] => 20447005 [patent_doc_number] => 20260003727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-01 [patent_title] => SCALABLE ARCHITECTURE FOR CONFIGURABLE DYNAMIC ERROR CORRECTION CODING (ECC) MEMORY [patent_app_type] => utility [patent_app_number] => 18/758859 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18758859 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/758859
SCALABLE ARCHITECTURE FOR CONFIGURABLE DYNAMIC ERROR CORRECTION CODING (ECC) MEMORY Jun 27, 2024 Pending
Array ( [id] => 20160072 [patent_doc_number] => 12386700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Managing data integrity using a change in a number of data errors and an amount of time in which the change occurred [patent_app_type] => utility [patent_app_number] => 18/755592 [patent_app_country] => US [patent_app_date] => 2024-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1028 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18755592 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/755592
Managing data integrity using a change in a number of data errors and an amount of time in which the change occurred Jun 25, 2024 Issued
Array ( [id] => 20447006 [patent_doc_number] => 20260003728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-01 [patent_title] => POLAR-BCH COMBINED GENERALIZED CONCATENATED CODES [patent_app_type] => utility [patent_app_number] => 18/754892 [patent_app_country] => US [patent_app_date] => 2024-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18754892 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/754892
POLAR-BCH COMBINED GENERALIZED CONCATENATED CODES Jun 25, 2024 Pending
Array ( [id] => 20595312 [patent_doc_number] => 12579029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-17 [patent_title] => Hashing based method for NAND data inversion [patent_app_type] => utility [patent_app_number] => 18/747831 [patent_app_country] => US [patent_app_date] => 2024-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 4031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18747831 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/747831
Hashing based method for NAND data inversion Jun 18, 2024 Issued
Array ( [id] => 20673257 [patent_doc_number] => 12613769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-28 [patent_title] => Apparatuses and methods for read/modify/write single-pass metadata access operations [patent_app_type] => utility [patent_app_number] => 18/747635 [patent_app_country] => US [patent_app_date] => 2024-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4091 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18747635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/747635
Apparatuses and methods for read/modify/write single-pass metadata access operations Jun 18, 2024 Issued
Array ( [id] => 19851466 [patent_doc_number] => 20250096817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => METHOD AND APPARATUS FOR PERFORMING DATA ACCESS CONTROL FOR HOST DEVICE [patent_app_type] => utility [patent_app_number] => 18/740578 [patent_app_country] => US [patent_app_date] => 2024-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11281 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18740578 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/740578
Method and apparatus for performing data access control for host device Jun 11, 2024 Issued
Array ( [id] => 19485270 [patent_doc_number] => 20240333312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => CAPACITY ACHIEVING MULTICARRIER MODULATION AND CODING SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 18/740416 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18740416 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/740416
Capacity achieving multicarrier modulation and coding systems and methods Jun 10, 2024 Issued
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