Search

Jyoti Mehta

Examiner (ID: 9002, Phone: (571)270-3995 , Office: P/2182 )

Most Active Art Unit
2182
Art Unit(s)
2183, 2182
Total Applications
338
Issued Applications
235
Pending Applications
22
Abandoned Applications
86

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5990532 [patent_doc_number] => 20110099355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'MULTI-THREADING PROCESSORS, INTEGRATED CIRCUIT DEVICES, SYSTEMS, AND PROCESSES OF OPERATION AND MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 12/986136 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 51672 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20110099355.pdf [firstpage_image] =>[orig_patent_app_number] => 12986136 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/986136
Multithreaded processor with plurality of scoreboards each issuing to plurality of pipelines Jan 5, 2011 Issued
Array ( [id] => 8279978 [patent_doc_number] => 20120173851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'MECHANISM FOR MAINTAINING DYNAMIC REGISTER-LEVEL MEMORY-MODE FLAGS IN A VIRTUAL MACHINE SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/982829 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4472 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12982829 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982829
MECHANISM FOR MAINTAINING DYNAMIC REGISTER-LEVEL MEMORY-MODE FLAGS IN A VIRTUAL MACHINE SYSTEM Dec 29, 2010 Abandoned
Array ( [id] => 8279976 [patent_doc_number] => 20120173854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'PROCESSOR HAVING INCREASED EFFECTIVE PHYSICAL FILE SIZE VIA REGISTER MAPPING' [patent_app_type] => utility [patent_app_number] => 12/980860 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3496 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12980860 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/980860
PROCESSOR HAVING INCREASED EFFECTIVE PHYSICAL FILE SIZE VIA REGISTER MAPPING Dec 28, 2010 Abandoned
Array ( [id] => 7714167 [patent_doc_number] => 20120005459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'PROCESSOR HAVING INCREASED PERFORMANCE AND ENERGY SAVING VIA MOVE ELIMINATION' [patent_app_type] => utility [patent_app_number] => 12/979948 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2623 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20120005459.pdf [firstpage_image] =>[orig_patent_app_number] => 12979948 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/979948
PROCESSOR HAVING INCREASED PERFORMANCE AND ENERGY SAVING VIA MOVE ELIMINATION Dec 27, 2010 Abandoned
Array ( [id] => 8267343 [patent_doc_number] => 20120166769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'PROCESSOR HAVING INCREASED PERFORMANCE VIA ELIMINATION OF SERIAL DEPENDENCIES' [patent_app_type] => utility [patent_app_number] => 12/979946 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3043 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12979946 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/979946
PROCESSOR HAVING INCREASED PERFORMANCE VIA ELIMINATION OF SERIAL DEPENDENCIES Dec 27, 2010 Abandoned
Array ( [id] => 8568698 [patent_doc_number] => 20120331269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'Geodesic Massively Parallel Computer.' [patent_app_type] => utility [patent_app_number] => 13/518889 [patent_app_country] => US [patent_app_date] => 2010-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7075 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 27 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13518889 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/518889
Geodesic Massively Parallel Computer. Dec 23, 2010 Abandoned
Array ( [id] => 7582213 [patent_doc_number] => 20110296096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'Method And Apparatus For Virtualized Microcode Sequencing' [patent_app_type] => utility [patent_app_number] => 12/912169 [patent_app_country] => US [patent_app_date] => 2010-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6980 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20110296096.pdf [firstpage_image] =>[orig_patent_app_number] => 12912169 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/912169
Method And Apparatus For Virtualized Microcode Sequencing Oct 25, 2010 Abandoned
Array ( [id] => 6067478 [patent_doc_number] => 20110202749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'INSTRUCTION COMPRESSING APPARATUS AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/912533 [patent_app_country] => US [patent_app_date] => 2010-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5618 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20110202749.pdf [firstpage_image] =>[orig_patent_app_number] => 12912533 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/912533
NOP instruction compressing apparatus and method in a VLIW machine Oct 25, 2010 Issued
Array ( [id] => 13005575 [patent_doc_number] => 10026458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-17 [patent_title] => Memories and methods for performing vector atomic memory operations with mask control and variable data length and data unit size [patent_app_type] => utility [patent_app_number] => 12/909678 [patent_app_country] => US [patent_app_date] => 2010-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3807 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12909678 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/909678
Memories and methods for performing vector atomic memory operations with mask control and variable data length and data unit size Oct 20, 2010 Issued
Array ( [id] => 7785960 [patent_doc_number] => 20120047516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-23 [patent_title] => 'CONTEXT SWITCHING' [patent_app_type] => utility [patent_app_number] => 13/003222 [patent_app_country] => US [patent_app_date] => 2010-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8563 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20120047516.pdf [firstpage_image] =>[orig_patent_app_number] => 13003222 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/003222
Context switching using a context controller and on-chip context cache Aug 22, 2010 Issued
Array ( [id] => 11430955 [patent_doc_number] => 09569272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Device and method for the distributed execution of digital data processing operations' [patent_app_type] => utility [patent_app_number] => 12/833418 [patent_app_country] => US [patent_app_date] => 2010-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 8558 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 399 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12833418 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/833418
Device and method for the distributed execution of digital data processing operations Jul 8, 2010 Issued
Array ( [id] => 8130529 [patent_doc_number] => 20120089812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'SHARED RESOURCE MULTI-THREAD PROCESSOR ARRAY' [patent_app_type] => utility [patent_app_number] => 13/377428 [patent_app_country] => US [patent_app_date] => 2010-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16452 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20120089812.pdf [firstpage_image] =>[orig_patent_app_number] => 13377428 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/377428
Multithreaded processor array with heterogeneous function blocks communicating tokens via self-routing switch fabrics Jun 8, 2010 Issued
Array ( [id] => 13068943 [patent_doc_number] => 10055251 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-21 [patent_title] => Methods, systems, and media for injecting code into embedded devices [patent_app_type] => utility [patent_app_number] => 12/765814 [patent_app_country] => US [patent_app_date] => 2010-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4775 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12765814 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/765814
Methods, systems, and media for injecting code into embedded devices Apr 21, 2010 Issued
Array ( [id] => 8201763 [patent_doc_number] => 20120124338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'MULTI-THREADED DATA PROCESSING SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/138176 [patent_app_country] => US [patent_app_date] => 2010-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3213 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20120124338.pdf [firstpage_image] =>[orig_patent_app_number] => 13138176 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/138176
Scheduling execution of instructions on a processor having multiple hardware threads with different execution resources Jan 17, 2010 Issued
Array ( [id] => 9392336 [patent_doc_number] => 08688958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'System for data collection from processing elements in a SIMD processor' [patent_app_type] => utility [patent_app_number] => 13/144831 [patent_app_country] => US [patent_app_date] => 2010-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 20206 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13144831 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/144831
System for data collection from processing elements in a SIMD processor Jan 13, 2010 Issued
Array ( [id] => 8395784 [patent_doc_number] => 20120233616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'STREAM DATA PROCESSING METHOD AND STREAM PROCESSOR' [patent_app_type] => utility [patent_app_number] => 13/395502 [patent_app_country] => US [patent_app_date] => 2009-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8038 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13395502 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/395502
STREAM DATA PROCESSING METHOD AND STREAM PROCESSOR Dec 27, 2009 Abandoned
Array ( [id] => 7588578 [patent_doc_number] => 20110283089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => ' MODULARIZED MICRO PROCESSOR DESIGN' [patent_app_type] => utility [patent_app_number] => 13/146044 [patent_app_country] => US [patent_app_date] => 2009-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9427 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20110283089.pdf [firstpage_image] =>[orig_patent_app_number] => 13146044 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/146044
MODULARIZED MICRO PROCESSOR DESIGN Aug 9, 2009 Abandoned
Array ( [id] => 6217624 [patent_doc_number] => 20110138158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-09 [patent_title] => 'INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/056464 [patent_app_country] => US [patent_app_date] => 2009-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8514 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20110138158.pdf [firstpage_image] =>[orig_patent_app_number] => 13056464 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/056464
INTEGRATED CIRCUIT Jul 23, 2009 Abandoned
Array ( [id] => 7770357 [patent_doc_number] => 20120036341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-09 [patent_title] => 'DATA PROCESSING APPARATUS, FOR EXAMPLE USING MODES' [patent_app_type] => utility [patent_app_number] => 13/003432 [patent_app_country] => US [patent_app_date] => 2009-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 21341 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20120036341.pdf [firstpage_image] =>[orig_patent_app_number] => 13003432 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/003432
Data processing apparatus using privileged and non-privileged modes with multiple stacks May 26, 2009 Issued
Array ( [id] => 5960764 [patent_doc_number] => 20110185151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'Data Processing Architecture' [patent_app_type] => utility [patent_app_number] => 12/993801 [patent_app_country] => US [patent_app_date] => 2009-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20110185151.pdf [firstpage_image] =>[orig_patent_app_number] => 12993801 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/993801
Data Processing Architecture May 19, 2009 Abandoned
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