Search

Jyoti Mehta

Examiner (ID: 2518, Phone: (571)270-3995 , Office: P/2182 )

Most Active Art Unit
2182
Art Unit(s)
2183, 2182
Total Applications
324
Issued Applications
224
Pending Applications
19
Abandoned Applications
86

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17809414 [patent_doc_number] => 20220261249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => ADDRESS GENERATION METHOD, RELATED APPARATUS, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/730058 [patent_app_country] => US [patent_app_date] => 2022-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17730058 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/730058
Address generation method, related apparatus, and storage medium Apr 25, 2022 Issued
Array ( [id] => 18802832 [patent_doc_number] => 11835989 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-12-05 [patent_title] => FPGA search in a cloud compute node [patent_app_type] => utility [patent_app_number] => 17/725946 [patent_app_country] => US [patent_app_date] => 2022-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 18884 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17725946 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/725946
FPGA search in a cloud compute node Apr 20, 2022 Issued
Array ( [id] => 17581123 [patent_doc_number] => 20220137978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => METHOD AND APPARATUS FOR STATELESS PARALLEL PROCESSING OF TASKS AND WORKFLOWS [patent_app_type] => utility [patent_app_number] => 17/647911 [patent_app_country] => US [patent_app_date] => 2022-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647911 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/647911
Method and apparatus for stateless parallel processing of tasks and workflows Jan 12, 2022 Issued
Array ( [id] => 18471245 [patent_doc_number] => 20230205531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => RANDOM DATA USAGE [patent_app_type] => utility [patent_app_number] => 17/560658 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560658 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560658
RANDOM DATA USAGE Dec 22, 2021 Pending
Array ( [id] => 17629172 [patent_doc_number] => 20220164187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => MEMORY LOOKUP COMPUTING MECHANISMS [patent_app_type] => utility [patent_app_number] => 17/538556 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17538556 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/538556
Memory lookup computing mechanisms Nov 29, 2021 Issued
Array ( [id] => 18644622 [patent_doc_number] => 11768690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => Coprocessor context priority [patent_app_type] => utility [patent_app_number] => 17/532072 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 11453 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17532072 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/532072
Coprocessor context priority Nov 21, 2021 Issued
Array ( [id] => 18038887 [patent_doc_number] => 20220383103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => HARDWARE ACCELERATOR METHOD AND DEVICE [patent_app_type] => utility [patent_app_number] => 17/499149 [patent_app_country] => US [patent_app_date] => 2021-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8411 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17499149 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/499149
HARDWARE ACCELERATOR METHOD AND DEVICE Oct 11, 2021 Pending
Array ( [id] => 17675445 [patent_doc_number] => 20220188612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => NPU DEVICE PERFORMING CONVOLUTION OPERATION BASED ON THE NUMBER OF CHANNELS AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/496037 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11397 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17496037 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/496037
NPU DEVICE PERFORMING CONVOLUTION OPERATION BASED ON THE NUMBER OF CHANNELS AND OPERATING METHOD THEREOF Oct 6, 2021 Pending
Array ( [id] => 18592002 [patent_doc_number] => 11740900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Associatively indexed circular buffer [patent_app_type] => utility [patent_app_number] => 17/354810 [patent_app_country] => US [patent_app_date] => 2021-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5546 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17354810 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/354810
Associatively indexed circular buffer Jun 21, 2021 Issued
Array ( [id] => 17839572 [patent_doc_number] => 20220276877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => METHOD AND APPARATUS FOR SEQUENCE PROCESSING, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/351450 [patent_app_country] => US [patent_app_date] => 2021-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11621 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17351450 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/351450
METHOD AND APPARATUS FOR SEQUENCE PROCESSING, AND STORAGE MEDIUM Jun 17, 2021 Pending
Array ( [id] => 17084052 [patent_doc_number] => 20210279058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => Control Transfer Termination Instructions Of An Instruction Set Architecture (ISA) [patent_app_type] => utility [patent_app_number] => 17/329231 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17329231 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/329231
Control transfer termination instructions of an instruction set architecture (ISA) May 24, 2021 Issued
Array ( [id] => 17069267 [patent_doc_number] => 20210271483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => Control system for process data and method for controlling process data [patent_app_type] => utility [patent_app_number] => 17/246816 [patent_app_country] => US [patent_app_date] => 2021-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6802 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17246816 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/246816
Control system for process data and method for controlling process data May 2, 2021 Issued
Array ( [id] => 18386064 [patent_doc_number] => 11656845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Dot product calculators and methods of operating the same [patent_app_type] => utility [patent_app_number] => 17/243282 [patent_app_country] => US [patent_app_date] => 2021-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 13322 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17243282 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/243282
Dot product calculators and methods of operating the same Apr 27, 2021 Issued
Array ( [id] => 16993977 [patent_doc_number] => 20210232397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => MASK PATTERNS GENERATED IN MEMORY FROM SEED VECTORS [patent_app_type] => utility [patent_app_number] => 17/228518 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17228518 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/228518
Mask patterns generated in memory from seed vectors Apr 11, 2021 Issued
Array ( [id] => 18606644 [patent_doc_number] => 11748108 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Instruction executing method and apparatus, electronic device, and computer-readable storage medium [patent_app_type] => utility [patent_app_number] => 17/210616 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6240 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17210616 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/210616
Instruction executing method and apparatus, electronic device, and computer-readable storage medium Mar 23, 2021 Issued
Array ( [id] => 18304941 [patent_doc_number] => 11626858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => System improving signal handling [patent_app_type] => utility [patent_app_number] => 17/196946 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 13934 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17196946 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/196946
System improving signal handling Mar 8, 2021 Issued
Array ( [id] => 17394764 [patent_doc_number] => 11243778 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-02-08 [patent_title] => Instruction dispatch for superscalar processors [patent_app_type] => utility [patent_app_number] => 17/139425 [patent_app_country] => US [patent_app_date] => 2020-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7970 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17139425 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/139425
Instruction dispatch for superscalar processors Dec 30, 2020 Issued
Array ( [id] => 18291235 [patent_doc_number] => 11620105 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Hybrid floating point representation for deep learning acceleration [patent_app_type] => utility [patent_app_number] => 17/128407 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9264 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17128407 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/128407
Hybrid floating point representation for deep learning acceleration Dec 20, 2020 Issued
Array ( [id] => 17076669 [patent_doc_number] => 11113067 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-09-07 [patent_title] => Speculative branch pattern update [patent_app_type] => utility [patent_app_number] => 17/099852 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8218 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099852 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/099852
Speculative branch pattern update Nov 16, 2020 Issued
Array ( [id] => 18577692 [patent_doc_number] => 11734224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Overlay layer hardware unit for network of processor cores [patent_app_type] => utility [patent_app_number] => 17/035046 [patent_app_country] => US [patent_app_date] => 2020-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 14460 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17035046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/035046
Overlay layer hardware unit for network of processor cores Sep 27, 2020 Issued
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