Jyoti Mehta

Array ( [id] => 20507090 [patent_doc_number] => 12541366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Sorting elements in a memory array by comparing element vectors [patent_app_type] => utility [patent_app_number] => 18/534597 [patent_app_country] => US [patent_app_date] => 2023-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 1904 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18534597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20564004 [patent_doc_number] => 12566613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-03 [patent_title] => Microprocessor with speculative and in-order register sets [patent_app_type] => utility [patent_app_number] => 18/388908 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3979 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18388908 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19878486 [patent_doc_number] => 20250110743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => BRANCH TARGET BUFFER VICTIM CACHE [patent_app_type] => utility [patent_app_number] => 18/374223 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18374223 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20595248 [patent_doc_number] => 12578964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-17 [patent_title] => Prediction data corruption [patent_app_type] => utility [patent_app_number] => 18/459602 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3672 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459602 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20528976 [patent_doc_number] => 12547411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-10 [patent_title] => Securing conditional speculative instruction execution [patent_app_type] => utility [patent_app_number] => 18/353558 [patent_app_country] => US [patent_app_date] => 2023-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18353558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19686225 [patent_doc_number] => 20250004770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => CIRCUITRY AND METHODS FOR IMPLEMENTING ONE OR MORE KECCAK INSTRUCTIONS WITHIN A SINGLE LANE OF VECTOR EXECUTION CIRCUITRY [patent_app_type] => utility [patent_app_number] => 18/346093 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 40153 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18346093 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19451061 [patent_doc_number] => 20240311191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => NETWORK-ATTACHED HOSTLESS ACCELERATOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/121366 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9913 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18121366 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20482087 [patent_doc_number] => 12530562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Chiplet-based hierarchical tree topology architecture for neuromorphic computing [patent_app_type] => utility [patent_app_number] => 17/982995 [patent_app_country] => US [patent_app_date] => 2022-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1218 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17982995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18957356 [patent_doc_number] => 20240045683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => 8-BIT FLOATING POINT SQUARE ROOT AND/OR RECIPROCAL SQUARE ROOT INSTRUCTIONS [patent_app_type] => utility [patent_app_number] => 17/958371 [patent_app_country] => US [patent_app_date] => 2022-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14691 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17958371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17992044 [patent_doc_number] => 20220358081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => SYSTEMS AND METHODS FOR IMPLEMENTING A MACHINE PERCEPTION AND DENSE ALGORITHM INTEGRATED CIRCUIT AND ENABLING A FLOWING PROPAGATION OF DATA WITHIN THE INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/873585 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10927 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873585 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17947824 [patent_doc_number] => 20220334843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => METHOD AND APPARATUS FOR STATELESS PARALLEL PROCESSING OF TASKS AND WORKFLOWS [patent_app_type] => utility [patent_app_number] => 17/855477 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855477 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20481720 [patent_doc_number] => 12530195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Instruction set for min-max operations [patent_app_type] => utility [patent_app_number] => 17/747919 [patent_app_country] => US [patent_app_date] => 2022-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 27 [patent_no_of_words] => 14338 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747919 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17809414 [patent_doc_number] => 20220261249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => ADDRESS GENERATION METHOD, RELATED APPARATUS, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/730058 [patent_app_country] => US [patent_app_date] => 2022-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17730058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18802832 [patent_doc_number] => 11835989 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-12-05 [patent_title] => FPGA search in a cloud compute node [patent_app_type] => utility [patent_app_number] => 17/725946 [patent_app_country] => US [patent_app_date] => 2022-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 18884 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17725946 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18677812 [patent_doc_number] => 20230315459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => SYNCHRONOUS MICROTHREADING [patent_app_type] => utility [patent_app_number] => 17/712122 [patent_app_country] => US [patent_app_date] => 2022-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33884 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17712122 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18677797 [patent_doc_number] => 20230315444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => SYNCHRONOUS MICROTHREADING [patent_app_type] => utility [patent_app_number] => 17/712124 [patent_app_country] => US [patent_app_date] => 2022-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33951 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17712124 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17736745 [patent_doc_number] => 20220222204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => METHODS AND APPARATUS TO PROCESS WEB-SCALE GRAPHS [patent_app_type] => utility [patent_app_number] => 17/710877 [patent_app_country] => US [patent_app_date] => 2022-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14276 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17710877 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17581123 [patent_doc_number] => 20220137978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => METHOD AND APPARATUS FOR STATELESS PARALLEL PROCESSING OF TASKS AND WORKFLOWS [patent_app_type] => utility [patent_app_number] => 17/647911 [patent_app_country] => US [patent_app_date] => 2022-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647911 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18471245 [patent_doc_number] => 20230205531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => RANDOM DATA USAGE [patent_app_type] => utility [patent_app_number] => 17/560658 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560658 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17629172 [patent_doc_number] => 20220164187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => MEMORY LOOKUP COMPUTING MECHANISMS [patent_app_type] => utility [patent_app_number] => 17/538556 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17538556 [rel_patent_id] =>[rel_patent_doc_number] =>)