
Kajli Prince
Examiner (ID: 7158)
| Most Active Art Unit | 2874 |
| Art Unit(s) | 2874 |
| Total Applications | 361 |
| Issued Applications | 303 |
| Pending Applications | 0 |
| Abandoned Applications | 64 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6016411
[patent_doc_number] => 20020102802
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-01
[patent_title] => 'Novel technique to achieve thick silicide film for ultra-shallow junctions'
[patent_app_type] => new
[patent_app_number] => 09/774417
[patent_app_country] => US
[patent_app_date] => 2001-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 2141
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0102/20020102802.pdf
[firstpage_image] =>[orig_patent_app_number] => 09774417
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/774417 | Novel technique to achieve thick silicide film for ultra-shallow junctions | Jan 31, 2001 | Abandoned |
Array
(
[id] => 6889401
[patent_doc_number] => 20010024856
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-09-27
[patent_title] => 'Semiconductor device and fabrication method thereof'
[patent_app_type] => new
[patent_app_number] => 09/767957
[patent_app_country] => US
[patent_app_date] => 2001-01-24
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0024/20010024856.pdf
[firstpage_image] =>[orig_patent_app_number] => 09767957
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/767957 | Semiconductor device and fabrication method thereof | Jan 23, 2001 | Issued |
Array
(
[id] => 1402228
[patent_doc_number] => 06534399
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-18
[patent_title] => 'Dual damascene process using self-assembled monolayer'
[patent_app_type] => B1
[patent_app_number] => 09/769197
[patent_app_country] => US
[patent_app_date] => 2001-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3051
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/534/06534399.pdf
[firstpage_image] =>[orig_patent_app_number] => 09769197
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/769197 | Dual damascene process using self-assembled monolayer | Jan 23, 2001 | Issued |
Array
(
[id] => 5870699
[patent_doc_number] => 20020047201
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-25
[patent_title] => 'Semiconductor device with rare metal electrode'
[patent_app_type] => new
[patent_app_number] => 09/765437
[patent_app_country] => US
[patent_app_date] => 2001-01-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0047/20020047201.pdf
[firstpage_image] =>[orig_patent_app_number] => 09765437
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/765437 | Semiconductor device having a capacitor with rare metal electrode | Jan 21, 2001 | Issued |
Array
(
[id] => 5986411
[patent_doc_number] => 20020098668
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-25
[patent_title] => 'Pulsed laser deposition of transparent conducting thin films on flexible substrates'
[patent_app_type] => new
[patent_app_number] => 09/766487
[patent_app_country] => US
[patent_app_date] => 2001-01-19
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[pdf_file] => publications/A1/0098/20020098668.pdf
[firstpage_image] =>[orig_patent_app_number] => 09766487
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/766487 | Pulsed laser deposition of transparent conducting thin films on flexible substrates | Jan 18, 2001 | Issued |
Array
(
[id] => 6907345
[patent_doc_number] => 20010010112
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-02
[patent_title] => 'Manufacturing method of semiconductor wafer, semiconductor manufacturing apparatus, and semiconductor device'
[patent_app_type] => new
[patent_app_number] => 09/761738
[patent_app_country] => US
[patent_app_date] => 2001-01-18
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[pdf_file] => publications/A1/0010/20010010112.pdf
[firstpage_image] =>[orig_patent_app_number] => 09761738
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/761738 | Manufacturing method of semiconductor wafer, semiconductor manufacturing apparatus, and semiconductor device | Jan 17, 2001 | Abandoned |
Array
(
[id] => 5874073
[patent_doc_number] => 20020048896
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-25
[patent_title] => 'Method of fabricating isolation trenches in a semiconductor substrate'
[patent_app_type] => new
[patent_app_number] => 09/761887
[patent_app_country] => US
[patent_app_date] => 2001-01-17
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0048/20020048896.pdf
[firstpage_image] =>[orig_patent_app_number] => 09761887
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/761887 | Method of fabricating isolation trenches in a semiconductor substrate | Jan 16, 2001 | Abandoned |
Array
(
[id] => 5968537
[patent_doc_number] => 20020090797
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-11
[patent_title] => 'Method for protecting insulation corners of shallow trenches by oxidation of poly silicon'
[patent_app_type] => new
[patent_app_number] => 09/757557
[patent_app_country] => US
[patent_app_date] => 2001-01-09
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0090/20020090797.pdf
[firstpage_image] =>[orig_patent_app_number] => 09757557
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/757557 | Method for protecting insulation corners of shallow trenches by oxidation of poly silicon | Jan 8, 2001 | Abandoned |
Array
(
[id] => 1500240
[patent_doc_number] => 06486013
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-11-26
[patent_title] => 'Method of manufacturing a semiconductor device having regions of different conductivity types isolated by field oxide'
[patent_app_type] => B2
[patent_app_number] => 09/755093
[patent_app_country] => US
[patent_app_date] => 2001-01-08
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[pdf_file] => patents/06/486/06486013.pdf
[firstpage_image] =>[orig_patent_app_number] => 09755093
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/755093 | Method of manufacturing a semiconductor device having regions of different conductivity types isolated by field oxide | Jan 7, 2001 | Issued |
| 09/719947 | Method for determining parameter distributions of object properties | Jan 2, 2001 | Abandoned |
Array
(
[id] => 1375583
[patent_doc_number] => 06559003
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-05-06
[patent_title] => 'Method of producing a ferroelectric semiconductor memory'
[patent_app_type] => B2
[patent_app_number] => 09/753587
[patent_app_country] => US
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[pdf_file] => patents/06/559/06559003.pdf
[firstpage_image] =>[orig_patent_app_number] => 09753587
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/753587 | Method of producing a ferroelectric semiconductor memory | Jan 2, 2001 | Issued |
Array
(
[id] => 1578233
[patent_doc_number] => 06448165
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[patent_kind] => B1
[patent_issue_date] => 2002-09-10
[patent_title] => 'Method for controlling the amount of trim of a gate structure of a field effect transistor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/746397 | Method for controlling the amount of trim of a gate structure of a field effect transistor | Dec 20, 2000 | Issued |
Array
(
[id] => 1123253
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[patent_title] => 'Method for reducing dark current in image sensor'
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[firstpage_image] =>[orig_patent_app_number] => 09740947
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/740947 | Method for reducing dark current in image sensor | Dec 20, 2000 | Issued |
Array
(
[id] => 1347648
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[patent_issue_date] => 2003-06-17
[patent_title] => 'Method and apparatus for modifying the profile of narrow, high-aspect-ratio gaps through wafer heating'
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Array
(
[id] => 6902170
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[patent_issue_date] => 2001-05-10
[patent_title] => 'Electrode structure and method for fabricating the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/746577 | Methods for fabricating an electrode structure | Dec 19, 2000 | Issued |
Array
(
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[patent_issue_date] => 2003-06-10
[patent_title] => 'Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications'
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Array
(
[id] => 979033
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[patent_issue_date] => 2005-08-16
[patent_title] => 'Process for forming a metal interconnect'
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/734557 | Method of fabricating semiconductor device | Dec 12, 2000 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/733457 | Method for growing barium titanate thin film | Dec 7, 2000 | Issued |