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Kajli Prince

Examiner (ID: 7158)

Most Active Art Unit
2874
Art Unit(s)
2874
Total Applications
361
Issued Applications
303
Pending Applications
0
Abandoned Applications
64

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6016411 [patent_doc_number] => 20020102802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'Novel technique to achieve thick silicide film for ultra-shallow junctions' [patent_app_type] => new [patent_app_number] => 09/774417 [patent_app_country] => US [patent_app_date] => 2001-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2141 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20020102802.pdf [firstpage_image] =>[orig_patent_app_number] => 09774417 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/774417
Novel technique to achieve thick silicide film for ultra-shallow junctions Jan 31, 2001 Abandoned
Array ( [id] => 6889401 [patent_doc_number] => 20010024856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-27 [patent_title] => 'Semiconductor device and fabrication method thereof' [patent_app_type] => new [patent_app_number] => 09/767957 [patent_app_country] => US [patent_app_date] => 2001-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3130 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20010024856.pdf [firstpage_image] =>[orig_patent_app_number] => 09767957 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/767957
Semiconductor device and fabrication method thereof Jan 23, 2001 Issued
Array ( [id] => 1402228 [patent_doc_number] => 06534399 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Dual damascene process using self-assembled monolayer' [patent_app_type] => B1 [patent_app_number] => 09/769197 [patent_app_country] => US [patent_app_date] => 2001-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3051 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/534/06534399.pdf [firstpage_image] =>[orig_patent_app_number] => 09769197 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/769197
Dual damascene process using self-assembled monolayer Jan 23, 2001 Issued
Array ( [id] => 5870699 [patent_doc_number] => 20020047201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-25 [patent_title] => 'Semiconductor device with rare metal electrode' [patent_app_type] => new [patent_app_number] => 09/765437 [patent_app_country] => US [patent_app_date] => 2001-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5452 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20020047201.pdf [firstpage_image] =>[orig_patent_app_number] => 09765437 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/765437
Semiconductor device having a capacitor with rare metal electrode Jan 21, 2001 Issued
Array ( [id] => 5986411 [patent_doc_number] => 20020098668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Pulsed laser deposition of transparent conducting thin films on flexible substrates' [patent_app_type] => new [patent_app_number] => 09/766487 [patent_app_country] => US [patent_app_date] => 2001-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2287 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20020098668.pdf [firstpage_image] =>[orig_patent_app_number] => 09766487 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/766487
Pulsed laser deposition of transparent conducting thin films on flexible substrates Jan 18, 2001 Issued
Array ( [id] => 6907345 [patent_doc_number] => 20010010112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-02 [patent_title] => 'Manufacturing method of semiconductor wafer, semiconductor manufacturing apparatus, and semiconductor device' [patent_app_type] => new [patent_app_number] => 09/761738 [patent_app_country] => US [patent_app_date] => 2001-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 11098 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20010010112.pdf [firstpage_image] =>[orig_patent_app_number] => 09761738 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/761738
Manufacturing method of semiconductor wafer, semiconductor manufacturing apparatus, and semiconductor device Jan 17, 2001 Abandoned
Array ( [id] => 5874073 [patent_doc_number] => 20020048896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-25 [patent_title] => 'Method of fabricating isolation trenches in a semiconductor substrate' [patent_app_type] => new [patent_app_number] => 09/761887 [patent_app_country] => US [patent_app_date] => 2001-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1447 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20020048896.pdf [firstpage_image] =>[orig_patent_app_number] => 09761887 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/761887
Method of fabricating isolation trenches in a semiconductor substrate Jan 16, 2001 Abandoned
Array ( [id] => 5968537 [patent_doc_number] => 20020090797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-11 [patent_title] => 'Method for protecting insulation corners of shallow trenches by oxidation of poly silicon' [patent_app_type] => new [patent_app_number] => 09/757557 [patent_app_country] => US [patent_app_date] => 2001-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2350 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20020090797.pdf [firstpage_image] =>[orig_patent_app_number] => 09757557 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/757557
Method for protecting insulation corners of shallow trenches by oxidation of poly silicon Jan 8, 2001 Abandoned
Array ( [id] => 1500240 [patent_doc_number] => 06486013 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-26 [patent_title] => 'Method of manufacturing a semiconductor device having regions of different conductivity types isolated by field oxide' [patent_app_type] => B2 [patent_app_number] => 09/755093 [patent_app_country] => US [patent_app_date] => 2001-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 13245 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/486/06486013.pdf [firstpage_image] =>[orig_patent_app_number] => 09755093 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/755093
Method of manufacturing a semiconductor device having regions of different conductivity types isolated by field oxide Jan 7, 2001 Issued
09/719947 Method for determining parameter distributions of object properties Jan 2, 2001 Abandoned
Array ( [id] => 1375583 [patent_doc_number] => 06559003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-06 [patent_title] => 'Method of producing a ferroelectric semiconductor memory' [patent_app_type] => B2 [patent_app_number] => 09/753587 [patent_app_country] => US [patent_app_date] => 2001-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3390 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/559/06559003.pdf [firstpage_image] =>[orig_patent_app_number] => 09753587 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/753587
Method of producing a ferroelectric semiconductor memory Jan 2, 2001 Issued
Array ( [id] => 1578233 [patent_doc_number] => 06448165 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Method for controlling the amount of trim of a gate structure of a field effect transistor' [patent_app_type] => B1 [patent_app_number] => 09/746397 [patent_app_country] => US [patent_app_date] => 2000-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3863 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 507 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/448/06448165.pdf [firstpage_image] =>[orig_patent_app_number] => 09746397 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/746397
Method for controlling the amount of trim of a gate structure of a field effect transistor Dec 20, 2000 Issued
Array ( [id] => 1123253 [patent_doc_number] => 06794215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-21 [patent_title] => 'Method for reducing dark current in image sensor' [patent_app_type] => B2 [patent_app_number] => 09/740947 [patent_app_country] => US [patent_app_date] => 2000-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1793 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/794/06794215.pdf [firstpage_image] =>[orig_patent_app_number] => 09740947 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/740947
Method for reducing dark current in image sensor Dec 20, 2000 Issued
Array ( [id] => 1347648 [patent_doc_number] => 06579811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-17 [patent_title] => 'Method and apparatus for modifying the profile of narrow, high-aspect-ratio gaps through wafer heating' [patent_app_type] => B2 [patent_app_number] => 09/745918 [patent_app_country] => US [patent_app_date] => 2000-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 13321 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/579/06579811.pdf [firstpage_image] =>[orig_patent_app_number] => 09745918 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/745918
Method and apparatus for modifying the profile of narrow, high-aspect-ratio gaps through wafer heating Dec 19, 2000 Issued
Array ( [id] => 6902170 [patent_doc_number] => 20010001079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-05-10 [patent_title] => 'Electrode structure and method for fabricating the same' [patent_app_type] => new-utility [patent_app_number] => 09/746577 [patent_app_country] => US [patent_app_date] => 2000-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5380 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20010001079.pdf [firstpage_image] =>[orig_patent_app_number] => 09746577 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/746577
Methods for fabricating an electrode structure Dec 19, 2000 Issued
Array ( [id] => 1354833 [patent_doc_number] => 06576546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-10 [patent_title] => 'Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications' [patent_app_type] => B2 [patent_app_number] => 09/741677 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 23 [patent_no_of_words] => 16107 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/576/06576546.pdf [firstpage_image] =>[orig_patent_app_number] => 09741677 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/741677
Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications Dec 18, 2000 Issued
Array ( [id] => 979033 [patent_doc_number] => 06930037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Process for forming a metal interconnect' [patent_app_type] => utility [patent_app_number] => 09/737397 [patent_app_country] => US [patent_app_date] => 2000-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 11655 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930037.pdf [firstpage_image] =>[orig_patent_app_number] => 09737397 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/737397
Process for forming a metal interconnect Dec 14, 2000 Issued
Array ( [id] => 6130165 [patent_doc_number] => 20020076910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'High density electronic interconnection' [patent_app_type] => new [patent_app_number] => 09/737407 [patent_app_country] => US [patent_app_date] => 2000-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4435 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20020076910.pdf [firstpage_image] =>[orig_patent_app_number] => 09737407 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/737407
High density electronic interconnection Dec 14, 2000 Abandoned
Array ( [id] => 1382108 [patent_doc_number] => 06551906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-22 [patent_title] => 'Method of fabricating semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/734557 [patent_app_country] => US [patent_app_date] => 2000-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 55 [patent_no_of_words] => 5070 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/551/06551906.pdf [firstpage_image] =>[orig_patent_app_number] => 09734557 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/734557
Method of fabricating semiconductor device Dec 12, 2000 Issued
Array ( [id] => 7105375 [patent_doc_number] => 20010004547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-21 [patent_title] => 'Method for growing barium titanate thin film' [patent_app_type] => new-utility [patent_app_number] => 09/733457 [patent_app_country] => US [patent_app_date] => 2000-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1851 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20010004547.pdf [firstpage_image] =>[orig_patent_app_number] => 09733457 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/733457
Method for growing barium titanate thin film Dec 7, 2000 Issued
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