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Kajli Prince

Examiner (ID: 7158)

Most Active Art Unit
2874
Art Unit(s)
2874
Total Applications
361
Issued Applications
303
Pending Applications
0
Abandoned Applications
64

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4084720 [patent_doc_number] => 06025240 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices' [patent_app_type] => 1 [patent_app_number] => 8/993600 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4105 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/025/06025240.pdf [firstpage_image] =>[orig_patent_app_number] => 993600 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/993600
Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices Dec 17, 1997 Issued
08/894990 SEMICONDUCTOR DEVICE HAVING TWO OR MORE METAL WIRING LAYERS AND METHOD FOR MAKING THE SAME Dec 3, 1997 Abandoned
Array ( [id] => 1368138 [patent_doc_number] => 06566281 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-20 [patent_title] => 'Nitrogen-rich barrier layer and structures formed' [patent_app_type] => B1 [patent_app_number] => 08/982150 [patent_app_country] => US [patent_app_date] => 1997-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5334 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/566/06566281.pdf [firstpage_image] =>[orig_patent_app_number] => 08982150 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/982150
Nitrogen-rich barrier layer and structures formed Nov 30, 1997 Issued
Array ( [id] => 4031274 [patent_doc_number] => 05963826 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Method of forming contact hole and multilayered lines structure' [patent_app_type] => 1 [patent_app_number] => 8/982079 [patent_app_country] => US [patent_app_date] => 1997-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 7401 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963826.pdf [firstpage_image] =>[orig_patent_app_number] => 982079 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/982079
Method of forming contact hole and multilayered lines structure Nov 30, 1997 Issued
Array ( [id] => 4029849 [patent_doc_number] => 05994211 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Method and composition for reducing gate oxide damage during RF sputter clean' [patent_app_type] => 1 [patent_app_number] => 8/976033 [patent_app_country] => US [patent_app_date] => 1997-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3302 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994211.pdf [firstpage_image] =>[orig_patent_app_number] => 976033 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/976033
Method and composition for reducing gate oxide damage during RF sputter clean Nov 20, 1997 Issued
Array ( [id] => 4376797 [patent_doc_number] => 06303391 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Low temperature chemical vapor deposition process for forming bismuth-containing ceramic films useful in ferroelectric memory devices' [patent_app_type] => 1 [patent_app_number] => 8/975087 [patent_app_country] => US [patent_app_date] => 1997-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 9596 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/303/06303391.pdf [firstpage_image] =>[orig_patent_app_number] => 975087 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/975087
Low temperature chemical vapor deposition process for forming bismuth-containing ceramic films useful in ferroelectric memory devices Nov 19, 1997 Issued
Array ( [id] => 4155856 [patent_doc_number] => 06156616 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Method for fabricating an NPN transistor in a BICMOS technology' [patent_app_type] => 1 [patent_app_number] => 8/969800 [patent_app_country] => US [patent_app_date] => 1997-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3135 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/156/06156616.pdf [firstpage_image] =>[orig_patent_app_number] => 969800 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/969800
Method for fabricating an NPN transistor in a BICMOS technology Nov 12, 1997 Issued
Array ( [id] => 1462684 [patent_doc_number] => 06350704 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-26 [patent_title] => 'Porous silicon oxycarbide integrated circuit insulator' [patent_app_type] => B1 [patent_app_number] => 08/950319 [patent_app_country] => US [patent_app_date] => 1997-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3110 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/350/06350704.pdf [firstpage_image] =>[orig_patent_app_number] => 08950319 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/950319
Porous silicon oxycarbide integrated circuit insulator Oct 13, 1997 Issued
Array ( [id] => 4366775 [patent_doc_number] => 06255738 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Encapsulant for microelectronic devices' [patent_app_type] => 1 [patent_app_number] => 8/940477 [patent_app_country] => US [patent_app_date] => 1997-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 5572 [patent_no_of_claims] => 70 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255738.pdf [firstpage_image] =>[orig_patent_app_number] => 940477 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/940477
Encapsulant for microelectronic devices Sep 29, 1997 Issued
Array ( [id] => 3994123 [patent_doc_number] => 05918118 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Dual deposition methods for forming contact metallizations, capacitors, and memory devices' [patent_app_type] => 1 [patent_app_number] => 8/931821 [patent_app_country] => US [patent_app_date] => 1997-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 4098 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/918/05918118.pdf [firstpage_image] =>[orig_patent_app_number] => 931821 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/931821
Dual deposition methods for forming contact metallizations, capacitors, and memory devices Sep 15, 1997 Issued
Array ( [id] => 1545287 [patent_doc_number] => 06444553 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Junction formation with diffusion barrier for silicide contacts and method for forming' [patent_app_type] => B1 [patent_app_number] => 09/110377 [patent_app_country] => US [patent_app_date] => 1997-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2338 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/444/06444553.pdf [firstpage_image] =>[orig_patent_app_number] => 09110377 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/110377
Junction formation with diffusion barrier for silicide contacts and method for forming Sep 14, 1997 Issued
Array ( [id] => 4125831 [patent_doc_number] => 06127289 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Method for treating semiconductor wafers with corona charge and devices using corona charging' [patent_app_type] => 1 [patent_app_number] => 8/924268 [patent_app_country] => US [patent_app_date] => 1997-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1591 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/127/06127289.pdf [firstpage_image] =>[orig_patent_app_number] => 924268 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/924268
Method for treating semiconductor wafers with corona charge and devices using corona charging Sep 4, 1997 Issued
Array ( [id] => 4187817 [patent_doc_number] => 06153444 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Method of measuring free carrier concentration and/or thickness of a semiconductor and process of manufacturing semiconductor device and semiconductor wafer using such method' [patent_app_type] => 1 [patent_app_number] => 8/921829 [patent_app_country] => US [patent_app_date] => 1997-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8229 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/153/06153444.pdf [firstpage_image] =>[orig_patent_app_number] => 921829 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/921829
Method of measuring free carrier concentration and/or thickness of a semiconductor and process of manufacturing semiconductor device and semiconductor wafer using such method Sep 1, 1997 Issued
Array ( [id] => 4142257 [patent_doc_number] => 06030904 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Stabilization of low-k carbon-based dielectrics' [patent_app_type] => 1 [patent_app_number] => 8/916001 [patent_app_country] => US [patent_app_date] => 1997-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 2596 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/030/06030904.pdf [firstpage_image] =>[orig_patent_app_number] => 916001 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/916001
Stabilization of low-k carbon-based dielectrics Aug 20, 1997 Issued
Array ( [id] => 4328977 [patent_doc_number] => 06312994 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/915629 [patent_app_country] => US [patent_app_date] => 1997-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 74 [patent_no_of_words] => 15501 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/312/06312994.pdf [firstpage_image] =>[orig_patent_app_number] => 915629 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/915629
Semiconductor device and method for fabricating the same Aug 20, 1997 Issued
Array ( [id] => 4206485 [patent_doc_number] => 06027966 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Isolated sidewall capacitor' [patent_app_type] => 1 [patent_app_number] => 8/910179 [patent_app_country] => US [patent_app_date] => 1997-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 3100 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/027/06027966.pdf [firstpage_image] =>[orig_patent_app_number] => 910179 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/910179
Isolated sidewall capacitor Aug 12, 1997 Issued
Array ( [id] => 4292745 [patent_doc_number] => 06180513 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Apparatus and method for manufacturing a semiconductor device having a multi-wiring layer structure' [patent_app_type] => 1 [patent_app_number] => 8/910007 [patent_app_country] => US [patent_app_date] => 1997-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 4679 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/180/06180513.pdf [firstpage_image] =>[orig_patent_app_number] => 910007 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/910007
Apparatus and method for manufacturing a semiconductor device having a multi-wiring layer structure Aug 11, 1997 Issued
Array ( [id] => 4009297 [patent_doc_number] => 05920779 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Differential gate oxide thickness by nitrogen implantation for mixed mode and embedded VLSI circuits' [patent_app_type] => 1 [patent_app_number] => 8/903595 [patent_app_country] => US [patent_app_date] => 1997-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 5717 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920779.pdf [firstpage_image] =>[orig_patent_app_number] => 903595 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/903595
Differential gate oxide thickness by nitrogen implantation for mixed mode and embedded VLSI circuits Jul 30, 1997 Issued
Array ( [id] => 4057984 [patent_doc_number] => 05909629 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-01 [patent_title] => 'Semiconductor processing method of forming field oxide regions on a semiconductor substrate' [patent_app_type] => 1 [patent_app_number] => 8/898531 [patent_app_country] => US [patent_app_date] => 1997-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2175 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/909/05909629.pdf [firstpage_image] =>[orig_patent_app_number] => 898531 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/898531
Semiconductor processing method of forming field oxide regions on a semiconductor substrate Jul 21, 1997 Issued
Array ( [id] => 3937830 [patent_doc_number] => 05981375 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/890987 [patent_app_country] => US [patent_app_date] => 1997-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2432 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/981/05981375.pdf [firstpage_image] =>[orig_patent_app_number] => 890987 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/890987
Method of manufacturing a semiconductor device Jul 9, 1997 Issued
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