Application number | Title of the application | Filing Date | Status |
---|
Array
(
[id] => 3100002
[patent_doc_number] => 05298764
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-29
[patent_title] => 'Semiconductor memory device having a field effect transistor with a channel formed from a polycrystalline silicon film'
[patent_app_type] => 1
[patent_app_number] => 7/846892
[patent_app_country] => US
[patent_app_date] => 1992-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 4100
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/298/05298764.pdf
[firstpage_image] =>[orig_patent_app_number] => 846892
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/846892 | Semiconductor memory device having a field effect transistor with a channel formed from a polycrystalline silicon film | Mar 5, 1992 | Issued |
Array
(
[id] => 3092780
[patent_doc_number] => 05278440
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-01-11
[patent_title] => 'Semiconductor memory device with improved tunneling characteristics'
[patent_app_type] => 1
[patent_app_number] => 7/846490
[patent_app_country] => US
[patent_app_date] => 1992-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 3634
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/278/05278440.pdf
[firstpage_image] =>[orig_patent_app_number] => 846490
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/846490 | Semiconductor memory device with improved tunneling characteristics | Mar 2, 1992 | Issued |
07/844223 | STATIC RANDOM ACCESS MEMORY DEVICE HAVING THIN FILM TRANSISTOR LOADS | Mar 1, 1992 | Abandoned |
Array
(
[id] => 2868677
[patent_doc_number] => 05150252
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-22
[patent_title] => 'Harmonics generation element'
[patent_app_type] => 1
[patent_app_number] => 7/841789
[patent_app_country] => US
[patent_app_date] => 1992-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3018
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 29
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/150/05150252.pdf
[firstpage_image] =>[orig_patent_app_number] => 841789
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/841789 | Harmonics generation element | Mar 1, 1992 | Issued |
Array
(
[id] => 2915687
[patent_doc_number] => 05227651
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-13
[patent_title] => 'Semiconductor device having a capacitor with an electrode grown through pinholes'
[patent_app_type] => 1
[patent_app_number] => 7/843629
[patent_app_country] => US
[patent_app_date] => 1992-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 19
[patent_no_of_words] => 3782
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/227/05227651.pdf
[firstpage_image] =>[orig_patent_app_number] => 843629
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/843629 | Semiconductor device having a capacitor with an electrode grown through pinholes | Feb 27, 1992 | Issued |
Array
(
[id] => 3100154
[patent_doc_number] => 05298772
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-29
[patent_title] => 'Integrated heterostructure acoustic charge transport (HACT) and heterostructure insulated gate field effects transistor (HIGFET) devices'
[patent_app_type] => 1
[patent_app_number] => 7/843470
[patent_app_country] => US
[patent_app_date] => 1992-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3129
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/298/05298772.pdf
[firstpage_image] =>[orig_patent_app_number] => 843470
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/843470 | Integrated heterostructure acoustic charge transport (HACT) and heterostructure insulated gate field effects transistor (HIGFET) devices | Feb 27, 1992 | Issued |
Array
(
[id] => 3009611
[patent_doc_number] => 05374847
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-20
[patent_title] => 'Nonvolatile semiconductor memory device having a passivation film'
[patent_app_type] => 1
[patent_app_number] => 7/838114
[patent_app_country] => US
[patent_app_date] => 1992-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 36
[patent_no_of_words] => 7266
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/374/05374847.pdf
[firstpage_image] =>[orig_patent_app_number] => 838114
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/838114 | Nonvolatile semiconductor memory device having a passivation film | Feb 19, 1992 | Issued |
Array
(
[id] => 2924991
[patent_doc_number] => 05235199
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-10
[patent_title] => 'Semiconductor memory with pad electrode and bit line under stacked capacitor'
[patent_app_type] => 1
[patent_app_number] => 7/831657
[patent_app_country] => US
[patent_app_date] => 1992-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 51
[patent_no_of_words] => 3897
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/235/05235199.pdf
[firstpage_image] =>[orig_patent_app_number] => 831657
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/831657 | Semiconductor memory with pad electrode and bit line under stacked capacitor | Feb 6, 1992 | Issued |
Array
(
[id] => 2980249
[patent_doc_number] => 05225699
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-06
[patent_title] => 'DRAM having a large dielectric breakdown voltage between an adjacent conductive layer and a capacitor electrode and method of manufacture thereof'
[patent_app_type] => 1
[patent_app_number] => 7/831438
[patent_app_country] => US
[patent_app_date] => 1992-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 24
[patent_no_of_words] => 4390
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/225/05225699.pdf
[firstpage_image] =>[orig_patent_app_number] => 831438
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/831438 | DRAM having a large dielectric breakdown voltage between an adjacent conductive layer and a capacitor electrode and method of manufacture thereof | Feb 4, 1992 | Issued |
Array
(
[id] => 2828352
[patent_doc_number] => 05173754
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-22
[patent_title] => 'Integrated circuit device with gate in sidewall'
[patent_app_type] => 1
[patent_app_number] => 7/829750
[patent_app_country] => US
[patent_app_date] => 1992-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 4934
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/173/05173754.pdf
[firstpage_image] =>[orig_patent_app_number] => 829750
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/829750 | Integrated circuit device with gate in sidewall | Feb 2, 1992 | Issued |
Array
(
[id] => 3033284
[patent_doc_number] => 05349229
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-09-20
[patent_title] => 'Local interconnect for integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 7/830129
[patent_app_country] => US
[patent_app_date] => 1992-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 2056
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 206
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/349/05349229.pdf
[firstpage_image] =>[orig_patent_app_number] => 830129
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/830129 | Local interconnect for integrated circuits | Jan 30, 1992 | Issued |
Array
(
[id] => 2890721
[patent_doc_number] => 05214303
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-05-25
[patent_title] => 'Semiconductor device ROM having an offset region'
[patent_app_type] => 1
[patent_app_number] => 7/826998
[patent_app_country] => US
[patent_app_date] => 1992-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 1831
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/214/05214303.pdf
[firstpage_image] =>[orig_patent_app_number] => 826998
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/826998 | Semiconductor device ROM having an offset region | Jan 27, 1992 | Issued |
Array
(
[id] => 2937775
[patent_doc_number] => 05220182
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-15
[patent_title] => 'Semiconductor device having conductive sidewall structure between adjacent elements'
[patent_app_type] => 1
[patent_app_number] => 7/824406
[patent_app_country] => US
[patent_app_date] => 1992-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 19
[patent_no_of_words] => 4367
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/220/05220182.pdf
[firstpage_image] =>[orig_patent_app_number] => 824406
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/824406 | Semiconductor device having conductive sidewall structure between adjacent elements | Jan 22, 1992 | Issued |
Array
(
[id] => 2911582
[patent_doc_number] => 05216267
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-01
[patent_title] => 'Stacked capacitor dynamic random access memory with a sloped lower electrode'
[patent_app_type] => 1
[patent_app_number] => 7/822865
[patent_app_country] => US
[patent_app_date] => 1992-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 2655
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 400
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/216/05216267.pdf
[firstpage_image] =>[orig_patent_app_number] => 822865
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/822865 | Stacked capacitor dynamic random access memory with a sloped lower electrode | Jan 20, 1992 | Issued |
Array
(
[id] => 2989359
[patent_doc_number] => 05250829
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-05
[patent_title] => 'Double well substrate plate trench DRAM cell array'
[patent_app_type] => 1
[patent_app_number] => 7/818668
[patent_app_country] => US
[patent_app_date] => 1992-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 4725
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/250/05250829.pdf
[firstpage_image] =>[orig_patent_app_number] => 818668
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/818668 | Double well substrate plate trench DRAM cell array | Jan 8, 1992 | Issued |
07/810408 | EPROM AND METHOD OF PRODUCING SAME | Dec 19, 1991 | Abandoned |
Array
(
[id] => 3092744
[patent_doc_number] => 05278438
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-01-11
[patent_title] => 'Electrically erasable and programmable read-only memory with source and drain regions along sidewalls of a trench structure'
[patent_app_type] => 1
[patent_app_number] => 7/810250
[patent_app_country] => US
[patent_app_date] => 1991-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 3567
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/278/05278438.pdf
[firstpage_image] =>[orig_patent_app_number] => 810250
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/810250 | Electrically erasable and programmable read-only memory with source and drain regions along sidewalls of a trench structure | Dec 18, 1991 | Issued |
Array
(
[id] => 2911544
[patent_doc_number] => 05216265
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-01
[patent_title] => 'Integrated circuit memory devices with high angle implant around top of trench to reduce gated diode leakage'
[patent_app_type] => 1
[patent_app_number] => 7/809812
[patent_app_country] => US
[patent_app_date] => 1991-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 2487
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/216/05216265.pdf
[firstpage_image] =>[orig_patent_app_number] => 809812
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/809812 | Integrated circuit memory devices with high angle implant around top of trench to reduce gated diode leakage | Dec 17, 1991 | Issued |
Array
(
[id] => 2798534
[patent_doc_number] => 05136419
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-08-04
[patent_title] => 'Sealed electrochromic device'
[patent_app_type] => 1
[patent_app_number] => 7/809209
[patent_app_country] => US
[patent_app_date] => 1991-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3671
[patent_no_of_claims] => 50
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/136/05136419.pdf
[firstpage_image] =>[orig_patent_app_number] => 809209
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/809209 | Sealed electrochromic device | Dec 12, 1991 | Issued |
Array
(
[id] => 2942213
[patent_doc_number] => 05260593
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-09
[patent_title] => 'Semiconductor floating gate device having improved channel-floating gate interaction'
[patent_app_type] => 1
[patent_app_number] => 7/805298
[patent_app_country] => US
[patent_app_date] => 1991-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2816
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/260/05260593.pdf
[firstpage_image] =>[orig_patent_app_number] => 805298
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/805298 | Semiconductor floating gate device having improved channel-floating gate interaction | Dec 9, 1991 | Issued |