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Kakali Chaki

Supervisory Patent Examiner (ID: 3211, Phone: (571)272-3719 , Office: P/2122 )

Most Active Art Unit
2122
Art Unit(s)
2307, 2100, 2193, 2764, 2762, 2755, 2124, 2316, 2122, 2899
Total Applications
634
Issued Applications
396
Pending Applications
105
Abandoned Applications
133

Applications

Application numberTitle of the applicationFiling DateStatus
07/801149 APPARATUS AND METHOD FOR DISTRIBUTED PROGRAM STACK Dec 1, 1991 Abandoned
07/785173 PROCESSOR INTERFACE CONTROLLER FOR INTERFACING PERIPHERAL DEVICES TO A PROCESSOR Oct 28, 1991 Abandoned
07/778254 GUARANTEEING GLOBAL SERIALIZABILITY BY APPLYING COMMITMENT ORDERING SELECTIVELY TO GLOBAL TRANSACTIONS Oct 16, 1991 Abandoned
Array ( [id] => 3016405 [patent_doc_number] => 05375211 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-20 [patent_title] => 'Bus error processing system having direct bus master/CPU communication' [patent_app_type] => 1 [patent_app_number] => 7/774640 [patent_app_country] => US [patent_app_date] => 1991-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5888 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/375/05375211.pdf [firstpage_image] =>[orig_patent_app_number] => 774640 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/774640
Bus error processing system having direct bus master/CPU communication Oct 10, 1991 Issued
Array ( [id] => 2929643 [patent_doc_number] => 05193149 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-09 [patent_title] => 'Dual-path computer interconnect system with four-ported packet memory control' [patent_app_type] => 1 [patent_app_number] => 7/774725 [patent_app_country] => US [patent_app_date] => 1991-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 11442 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/193/05193149.pdf [firstpage_image] =>[orig_patent_app_number] => 774725 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/774725
Dual-path computer interconnect system with four-ported packet memory control Oct 7, 1991 Issued
07/769513 INPUT/OUTPUT MODULE HAVING A COMBINATION INPUT/OUTPUT POINT Sep 30, 1991 Abandoned
07/759750 METHOD AND APPARATUS FOR ASSISTING DATA BUS TRANSFER PROTOCOL Sep 11, 1991 Abandoned
Array ( [id] => 2930030 [patent_doc_number] => 05193168 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-09 [patent_title] => 'Multiprocessing system with enhanced shared storage' [patent_app_type] => 1 [patent_app_number] => 7/754339 [patent_app_country] => US [patent_app_date] => 1991-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3892 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 412 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/193/05193168.pdf [firstpage_image] =>[orig_patent_app_number] => 754339 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/754339
Multiprocessing system with enhanced shared storage Sep 3, 1991 Issued
Array ( [id] => 3836734 [patent_doc_number] => 05790852 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Computer with extended virtual storage concept' [patent_app_type] => 1 [patent_app_number] => 7/750807 [patent_app_country] => US [patent_app_date] => 1991-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4093 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/790/05790852.pdf [firstpage_image] =>[orig_patent_app_number] => 750807 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/750807
Computer with extended virtual storage concept Aug 26, 1991 Issued
07/748922 FIRMWARE MODIFICATION SYSTEM WHEREIN OLDER VERSION CAN BE RETRIEVED Aug 22, 1991 Abandoned
07/747170 AUTOMATIC PROGRAM DOCUMENTATION Aug 18, 1991 Abandoned
07/735156 METHOD FOR INFORMATION COMMUNICATION BETWEEN CONCURRENTLY OPERATING COMPUTER PROGRAMS Jul 22, 1991 Abandoned
Array ( [id] => 3474062 [patent_doc_number] => 05469542 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-21 [patent_title] => 'Serial diagnostic interface bus for multiprocessor systems' [patent_app_type] => 1 [patent_app_number] => 7/733767 [patent_app_country] => US [patent_app_date] => 1991-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7852 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/469/05469542.pdf [firstpage_image] =>[orig_patent_app_number] => 733767 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/733767
Serial diagnostic interface bus for multiprocessor systems Jul 21, 1991 Issued
Array ( [id] => 3021687 [patent_doc_number] => 05355491 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-11 [patent_title] => 'Compiler including retargetable data generation' [patent_app_type] => 1 [patent_app_number] => 7/714466 [patent_app_country] => US [patent_app_date] => 1991-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5151 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/355/05355491.pdf [firstpage_image] =>[orig_patent_app_number] => 714466 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/714466
Compiler including retargetable data generation Jun 12, 1991 Issued
07/705331 OPTIMIZING COMPILER FOR COMPUTERS May 23, 1991 Abandoned
07/703394 COMMITMENT ORDERING FOR GUARNTEEING SERIALIZABILITY ACROSS DISTRIBUTED TRANSACTIONS May 20, 1991 Abandoned
07/705039 SUSPEND/RESUME CAPABILITY FOR A PROTECTED MODE MICROPROCESSOR May 16, 1991 Abandoned
07/703026 METHOD AND APPARATUS FACILITATING USE OF A HARD DISK DRIVE IN A COMPUTER SYSTEM HAVING SUSPEND/RESUME CAPABILITY May 16, 1991 Abandoned
Array ( [id] => 3050511 [patent_doc_number] => 05301325 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-05 [patent_title] => 'Use of stack depth to identify architechture and calling standard dependencies in machine code' [patent_app_type] => 1 [patent_app_number] => 7/666083 [patent_app_country] => US [patent_app_date] => 1991-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 14145 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/301/05301325.pdf [firstpage_image] =>[orig_patent_app_number] => 666083 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/666083
Use of stack depth to identify architechture and calling standard dependencies in machine code Mar 6, 1991 Issued
07/649844 AFFINITY SCHEDULING OF PROCESSES ON SYMMETRIC MULTIPROCESSING SYSTEMS Jan 31, 1991 Abandoned
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