Kakali Chaki

Array ( [id] => 11882658 [patent_doc_number] => 09753831 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-05 [patent_title] => 'Optimization of operating system and virtual machine monitor memory management' [patent_app_type] => utility [patent_app_number] => 13/483618 [patent_app_country] => US [patent_app_date] => 2012-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5953 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13483618 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8511856 [patent_doc_number] => 20120311264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'DATA MANAGEMENT METHOD, DEVICE, AND DATA CHIP' [patent_app_type] => utility [patent_app_number] => 13/483331 [patent_app_country] => US [patent_app_date] => 2012-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6985 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13483331 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8918026 [patent_doc_number] => 20130179651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'TECHNIQUES FOR HANDLING MEMORY ACCESSES BY PROCESSOR-INDEPENDENT EXECUTABLE CODE IN A MULTI-PROCESSOR ENVIRONMENT' [patent_app_type] => utility [patent_app_number] => 13/483633 [patent_app_country] => US [patent_app_date] => 2012-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3697 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13483633 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8511842 [patent_doc_number] => 20120311250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'ARCHITECTURE AND ACCESS METHOD OF HETEROGENEOUS MEMORIES' [patent_app_type] => utility [patent_app_number] => 13/484251 [patent_app_country] => US [patent_app_date] => 2012-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1460 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13484251 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8407813 [patent_doc_number] => 20120239881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-20 [patent_title] => 'INFORMATION DISPLAY DEVICE, METHOD OF DISPLAYING INFORMATION, AND COMPUTER PROGRAM' [patent_app_type] => utility [patent_app_number] => 13/482058 [patent_app_country] => US [patent_app_date] => 2012-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10756 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13482058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9912076 [patent_doc_number] => 20150067279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'DATA PROCESSING SYSTEM AND METHOD FOR OPERATING A DATA PROCESSING SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/394784 [patent_app_country] => US [patent_app_date] => 2012-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7079 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14394784 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10052426 [patent_doc_number] => 09092305 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-28 [patent_title] => 'Memory interface circuit' [patent_app_type] => utility [patent_app_number] => 13/447734 [patent_app_country] => US [patent_app_date] => 2012-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4291 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13447734 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8588542 [patent_doc_number] => 20130007363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'CONTROL DEVICE AND CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 13/447476 [patent_app_country] => US [patent_app_date] => 2012-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7115 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13447476 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9036197 [patent_doc_number] => 20130238835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'BURNING SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/447298 [patent_app_country] => US [patent_app_date] => 2012-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2082 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13447298 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9096368 [patent_doc_number] => 20130275679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'LOADING A PRE-FETCH CACHE USING A LOGICAL VOLUME MAPPING' [patent_app_type] => utility [patent_app_number] => 13/448104 [patent_app_country] => US [patent_app_date] => 2012-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4934 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13448104 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9096374 [patent_doc_number] => 20130275685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'INTELLIGENT DATA PRE-CACHING IN A RELATIONAL DATABASE MANAGEMENT SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/447569 [patent_app_country] => US [patent_app_date] => 2012-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5068 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13447569 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9096381 [patent_doc_number] => 20130275692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'STORAGE DEVICE AND METHODS THEREOF' [patent_app_type] => utility [patent_app_number] => 13/447907 [patent_app_country] => US [patent_app_date] => 2012-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5909 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13447907 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8941787 [patent_doc_number] => 20130191584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'DETERMINISTIC HIGH INTEGRITY MULTI-PROCESSOR SYSTEM ON A CHIP' [patent_app_type] => utility [patent_app_number] => 13/355721 [patent_app_country] => US [patent_app_date] => 2012-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4856 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13355721 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9947511 [patent_doc_number] => 08996839 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-31 [patent_title] => 'Data storage device aligning partition to boundary of sector when partition offset correlates with offset of write commands' [patent_app_type] => utility [patent_app_number] => 13/356453 [patent_app_country] => US [patent_app_date] => 2012-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 2684 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13356453 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8314884 [patent_doc_number] => 20120191901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'METHOD AND APPARATUS FOR MEMORY MANAGEMENT' [patent_app_type] => utility [patent_app_number] => 13/354513 [patent_app_country] => US [patent_app_date] => 2012-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6650 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13354513 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8941802 [patent_doc_number] => 20130191599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'CACHE SET REPLACEMENT ORDER BASED ON TEMPORAL SET RECORDING' [patent_app_type] => utility [patent_app_number] => 13/354894 [patent_app_country] => US [patent_app_date] => 2012-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13354894 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10124341 [patent_doc_number] => 09158700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Storing cached data in over-provisioned memory in response to power loss' [patent_app_type] => utility [patent_app_number] => 13/354559 [patent_app_country] => US [patent_app_date] => 2012-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6882 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13354559 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8855405 [patent_doc_number] => 20130145080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-06 [patent_title] => 'Processing IC with Embedded Non Volatile Memory' [patent_app_type] => utility [patent_app_number] => 13/636397 [patent_app_country] => US [patent_app_date] => 2011-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5137 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13636397 [rel_patent_id] =>[rel_patent_doc_number] =>)