Search

Kalpit Parikh

Examiner (ID: 4885, Phone: (571)270-1173 , Office: P/2137 )

Most Active Art Unit
2137
Art Unit(s)
2187, 2137
Total Applications
668
Issued Applications
507
Pending Applications
55
Abandoned Applications
123

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19864427 [patent_doc_number] => 20250103213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => ADAPTABLE DATA MODULATION IN MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/790132 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18790132 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/790132
ADAPTABLE DATA MODULATION IN MEMORY SYSTEMS Jul 30, 2024 Pending
Array ( [id] => 19864428 [patent_doc_number] => 20250103214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => DYNAMICALLY CONFIGURABLE DATA MODULATION IN MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/790233 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18790233 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/790233
DYNAMICALLY CONFIGURABLE DATA MODULATION IN MEMORY SYSTEMS Jul 30, 2024 Pending
Array ( [id] => 20181038 [patent_doc_number] => 20250264996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE, OPERATING METHOD THEREOF, AND OPERATING METHOD OF NONVOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/790631 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11978 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18790631 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/790631
STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE, OPERATING METHOD THEREOF, AND OPERATING METHOD OF NONVOLATILE MEMORY DEVICE Jul 30, 2024 Pending
Array ( [id] => 19864428 [patent_doc_number] => 20250103214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => DYNAMICALLY CONFIGURABLE DATA MODULATION IN MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/790233 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18790233 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/790233
DYNAMICALLY CONFIGURABLE DATA MODULATION IN MEMORY SYSTEMS Jul 30, 2024 Pending
Array ( [id] => 19878412 [patent_doc_number] => 20250110669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => STORING SEQUENTIAL AND RANDOM DATA IN DIFFERENT LAYOUTS [patent_app_type] => utility [patent_app_number] => 18/788786 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18788786 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/788786
STORING SEQUENTIAL AND RANDOM DATA IN DIFFERENT LAYOUTS Jul 29, 2024 Pending
Array ( [id] => 19558409 [patent_doc_number] => 20240370201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => ENABLING MEMORY ACCESS TRANSACTIONS FOR PERSISTENT MEMORY [patent_app_type] => utility [patent_app_number] => 18/774277 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18774277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/774277
ENABLING MEMORY ACCESS TRANSACTIONS FOR PERSISTENT MEMORY Jul 15, 2024 Pending
Array ( [id] => 19558409 [patent_doc_number] => 20240370201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => ENABLING MEMORY ACCESS TRANSACTIONS FOR PERSISTENT MEMORY [patent_app_type] => utility [patent_app_number] => 18/774277 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18774277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/774277
ENABLING MEMORY ACCESS TRANSACTIONS FOR PERSISTENT MEMORY Jul 15, 2024 Pending
Array ( [id] => 19558409 [patent_doc_number] => 20240370201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => ENABLING MEMORY ACCESS TRANSACTIONS FOR PERSISTENT MEMORY [patent_app_type] => utility [patent_app_number] => 18/774277 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18774277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/774277
ENABLING MEMORY ACCESS TRANSACTIONS FOR PERSISTENT MEMORY Jul 15, 2024 Pending
Array ( [id] => 19362720 [patent_doc_number] => 20240264754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => SYSTEM AND METHOD FOR POWER MANAGEMENT IN SOLID STATE STORAGE SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/638815 [patent_app_country] => US [patent_app_date] => 2024-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18638815 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/638815
System and method for power management in solid state storage systems Apr 17, 2024 Issued
Array ( [id] => 20117292 [patent_doc_number] => 12366996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Command queuing [patent_app_type] => utility [patent_app_number] => 18/629460 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 1342 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629460 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629460
Command queuing Apr 7, 2024 Issued
Array ( [id] => 20228404 [patent_doc_number] => 12417055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => High-performance input buffer and memory device having the same [patent_app_type] => utility [patent_app_number] => 18/625987 [patent_app_country] => US [patent_app_date] => 2024-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 1312 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18625987 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/625987
High-performance input buffer and memory device having the same Apr 2, 2024 Issued
Array ( [id] => 19362737 [patent_doc_number] => 20240264771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => CORRECTIVE READ OF A MEMORY DEVICE WITH REDUCED LATENCY [patent_app_type] => utility [patent_app_number] => 18/441911 [patent_app_country] => US [patent_app_date] => 2024-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18441911 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/441911
CORRECTIVE READ OF A MEMORY DEVICE WITH REDUCED LATENCY Feb 13, 2024 Pending
Array ( [id] => 19362737 [patent_doc_number] => 20240264771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => CORRECTIVE READ OF A MEMORY DEVICE WITH REDUCED LATENCY [patent_app_type] => utility [patent_app_number] => 18/441911 [patent_app_country] => US [patent_app_date] => 2024-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18441911 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/441911
CORRECTIVE READ OF A MEMORY DEVICE WITH REDUCED LATENCY Feb 13, 2024 Pending
Array ( [id] => 20137872 [patent_doc_number] => 20250244916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => SDS LOCAL DATA PATH OPTIMIZATION SYSTEM [patent_app_type] => utility [patent_app_number] => 18/423480 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18423480 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/423480
SDS LOCAL DATA PATH OPTIMIZATION SYSTEM Jan 25, 2024 Pending
Array ( [id] => 19382958 [patent_doc_number] => 20240272828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => STORAGE DEVICE AND CONNECTION CHECKING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/420083 [patent_app_country] => US [patent_app_date] => 2024-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18420083 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/420083
STORAGE DEVICE AND CONNECTION CHECKING METHOD THEREOF Jan 22, 2024 Pending
Array ( [id] => 20123103 [patent_doc_number] => 20250238134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => Multiple Function Nonvolatile Memory Express (NVMe) Device (MFND) Performance Improvement By Over Reading [patent_app_type] => utility [patent_app_number] => 18/419013 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1264 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419013 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419013
Multiple Function Nonvolatile Memory Express (NVMe) Device (MFND) Performance Improvement By Over Reading Jan 21, 2024 Pending
Array ( [id] => 19174611 [patent_doc_number] => 20240160585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => SHARING MEMORY AND I/O SERVICES BETWEEN NODES [patent_app_type] => utility [patent_app_number] => 18/419159 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419159 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419159
Sharing memory and I/O services between nodes Jan 21, 2024 Issued
Array ( [id] => 19617260 [patent_doc_number] => 20240402940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => METHOD AND SYSTEM FOR PERFORMING DYNAMIC HOST MEMORY BUFFER (HMB) MANAGEMENT IN PCIe BASED DEVICES [patent_app_type] => utility [patent_app_number] => 18/416512 [patent_app_country] => US [patent_app_date] => 2024-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8999 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18416512 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/416512
METHOD AND SYSTEM FOR PERFORMING DYNAMIC HOST MEMORY BUFFER (HMB) MANAGEMENT IN PCIe BASED DEVICES Jan 17, 2024 Pending
Array ( [id] => 19617260 [patent_doc_number] => 20240402940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => METHOD AND SYSTEM FOR PERFORMING DYNAMIC HOST MEMORY BUFFER (HMB) MANAGEMENT IN PCIe BASED DEVICES [patent_app_type] => utility [patent_app_number] => 18/416512 [patent_app_country] => US [patent_app_date] => 2024-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8999 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18416512 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/416512
METHOD AND SYSTEM FOR PERFORMING DYNAMIC HOST MEMORY BUFFER (HMB) MANAGEMENT IN PCIe BASED DEVICES Jan 17, 2024 Pending
Array ( [id] => 19144580 [patent_doc_number] => 20240143497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => PROCESSING-IN-MEMORY (PIM) DEVICES [patent_app_type] => utility [patent_app_number] => 18/411586 [patent_app_country] => US [patent_app_date] => 2024-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 56802 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18411586 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/411586
PROCESSING-IN-MEMORY (PIM) DEVICES Jan 11, 2024 Pending
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