
Kalpit Parikh
Examiner (ID: 5922, Phone: (571)270-1173 , Office: P/2137 )
| Most Active Art Unit | 2137 |
| Art Unit(s) | 2137, 2187 |
| Total Applications | 680 |
| Issued Applications | 517 |
| Pending Applications | 48 |
| Abandoned Applications | 123 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16370972
[patent_doc_number] => 10802727
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-13
[patent_title] => Solid-state storage power failure protection using distributed metadata checkpointing
[patent_app_type] => utility
[patent_app_number] => 15/984547
[patent_app_country] => US
[patent_app_date] => 2018-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4631
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15984547
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/984547 | Solid-state storage power failure protection using distributed metadata checkpointing | May 20, 2018 | Issued |
Array
(
[id] => 13403397
[patent_doc_number] => 20180253241
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-09-06
[patent_title] => SAVE CRITICAL DATA UPON POWER LOSS
[patent_app_type] => utility
[patent_app_number] => 15/971588
[patent_app_country] => US
[patent_app_date] => 2018-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9580
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15971588
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/971588 | Save critical data upon power loss | May 3, 2018 | Issued |
Array
(
[id] => 16495507
[patent_doc_number] => 10861554
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-08
[patent_title] => Fractional program commands for memory devices
[patent_app_type] => utility
[patent_app_number] => 15/956647
[patent_app_country] => US
[patent_app_date] => 2018-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 9190
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956647
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/956647 | Fractional program commands for memory devices | Apr 17, 2018 | Issued |
Array
(
[id] => 17223346
[patent_doc_number] => 11175845
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-16
[patent_title] => Adding a migration file group to a hierarchical storage management (HSM) system for data co-location
[patent_app_type] => utility
[patent_app_number] => 15/945953
[patent_app_country] => US
[patent_app_date] => 2018-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7873
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 456
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945953
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/945953 | Adding a migration file group to a hierarchical storage management (HSM) system for data co-location | Apr 4, 2018 | Issued |
Array
(
[id] => 14968527
[patent_doc_number] => 20190311742
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-10
[patent_title] => LOCATION SELECTION BASED ON ADJACENT LOCATION ERRORS
[patent_app_type] => utility
[patent_app_number] => 15/945934
[patent_app_country] => US
[patent_app_date] => 2018-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9318
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945934
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/945934 | Location selection based on adjacent location errors | Apr 4, 2018 | Issued |
Array
(
[id] => 14966939
[patent_doc_number] => 20190310948
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-10
[patent_title] => APPARATUS AND METHOD FOR ACCESSING AN ADDRESS TRANSLATION CACHE
[patent_app_type] => utility
[patent_app_number] => 15/945900
[patent_app_country] => US
[patent_app_date] => 2018-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6358
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945900
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/945900 | Apparatus and method for accessing an address translation cache | Apr 4, 2018 | Issued |
Array
(
[id] => 16291972
[patent_doc_number] => 10768821
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-08
[patent_title] => Memory system and method of operating the same
[patent_app_type] => utility
[patent_app_number] => 15/944929
[patent_app_country] => US
[patent_app_date] => 2018-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 8315
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15944929
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/944929 | Memory system and method of operating the same | Apr 3, 2018 | Issued |
Array
(
[id] => 16957720
[patent_doc_number] => 11061580
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-13
[patent_title] => Storage device and controllers included in storage device
[patent_app_type] => utility
[patent_app_number] => 15/945385
[patent_app_country] => US
[patent_app_date] => 2018-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 9192
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945385
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/945385 | Storage device and controllers included in storage device | Apr 3, 2018 | Issued |
Array
(
[id] => 17715398
[patent_doc_number] => 11379389
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-07-05
[patent_title] => Communicating between data processing engines using shared memory
[patent_app_type] => utility
[patent_app_number] => 15/944179
[patent_app_country] => US
[patent_app_date] => 2018-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 6972
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15944179
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/944179 | Communicating between data processing engines using shared memory | Apr 2, 2018 | Issued |
Array
(
[id] => 14935319
[patent_doc_number] => 20190303297
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-03
[patent_title] => APPARATUS, METHODS, AND SYSTEMS FOR REMOTE MEMORY ACCESS IN A CONFIGURABLE SPATIAL ACCELERATOR
[patent_app_type] => utility
[patent_app_number] => 15/943608
[patent_app_country] => US
[patent_app_date] => 2018-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 78590
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943608
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/943608 | APPARATUS, METHODS, AND SYSTEMS FOR REMOTE MEMORY ACCESS IN A CONFIGURABLE SPATIAL ACCELERATOR | Apr 1, 2018 | Abandoned |
Array
(
[id] => 12914704
[patent_doc_number] => 20180196744
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-07-12
[patent_title] => MEMORY SYSTEM AND METHOD FOR CONTROLLING NONVOLATILE MEMORY
[patent_app_type] => utility
[patent_app_number] => 15/912150
[patent_app_country] => US
[patent_app_date] => 2018-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14368
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15912150
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/912150 | Memory system and method for controlling nonvolatile memory | Mar 4, 2018 | Issued |
Array
(
[id] => 13376025
[patent_doc_number] => 20180239554
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-23
[patent_title] => LINKING SERVER AND INFORMATION PROCESSING METHOD
[patent_app_type] => utility
[patent_app_number] => 15/903763
[patent_app_country] => US
[patent_app_date] => 2018-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3921
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903763
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/903763 | Linking server and information processing method | Feb 22, 2018 | Issued |
Array
(
[id] => 17499311
[patent_doc_number] => 11288017
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-03-29
[patent_title] => Devices, systems, and methods for storing data using distributed control
[patent_app_type] => utility
[patent_app_number] => 15/904080
[patent_app_country] => US
[patent_app_date] => 2018-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9505
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 756
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15904080
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/904080 | Devices, systems, and methods for storing data using distributed control | Feb 22, 2018 | Issued |
Array
(
[id] => 14781981
[patent_doc_number] => 20190265888
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-29
[patent_title] => Storage System and Method for Performing High-Speed Read and Write Operations
[patent_app_type] => utility
[patent_app_number] => 15/903930
[patent_app_country] => US
[patent_app_date] => 2018-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8167
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903930
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/903930 | Storage system and method for performing high-speed read and write operations | Feb 22, 2018 | Issued |
Array
(
[id] => 14282331
[patent_doc_number] => 20190138450
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-09
[patent_title] => METHOD TO AVOID CACHE ACCESS CONFLICT BETWEEN LOAD AND FILL
[patent_app_type] => utility
[patent_app_number] => 15/900789
[patent_app_country] => US
[patent_app_date] => 2018-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6546
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15900789
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/900789 | Method to avoid cache access conflict between load and fill | Feb 19, 2018 | Issued |
Array
(
[id] => 12848440
[patent_doc_number] => 20180174653
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-06-21
[patent_title] => METHOD AND DEVICE TO REDUCE LEAKAGE AND DYNAMIC ENERGY CONSUMPTION IN HIGH-SPEED MEMORIES
[patent_app_type] => utility
[patent_app_number] => 15/897503
[patent_app_country] => US
[patent_app_date] => 2018-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12755
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15897503
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/897503 | Method and device to reduce leakage and dynamic energy consumption in high-speed memories | Feb 14, 2018 | Issued |
Array
(
[id] => 12819526
[patent_doc_number] => 20180165014
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-06-14
[patent_title] => ARRAY CONTROLLER, SOLID STATE DISK, AND METHOD FOR CONTROLLING SOLID STATE DISK TO WRITE DATA
[patent_app_type] => utility
[patent_app_number] => 15/889209
[patent_app_country] => US
[patent_app_date] => 2018-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10275
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15889209
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/889209 | Array controller, solid state disk, and method for controlling solid state disk to write data | Feb 5, 2018 | Issued |
Array
(
[id] => 15012803
[patent_doc_number] => 10452547
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-10-22
[patent_title] => Fault-tolerant cache coherence over a lossy network
[patent_app_type] => utility
[patent_app_number] => 15/858787
[patent_app_country] => US
[patent_app_date] => 2017-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
[patent_figures_cnt] => 56
[patent_no_of_words] => 16820
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 314
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858787
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/858787 | Fault-tolerant cache coherence over a lossy network | Dec 28, 2017 | Issued |
Array
(
[id] => 13875971
[patent_doc_number] => 20190034326
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-31
[patent_title] => DYNAMIC CONFIGURATION OF CACHES IN A MULTI-CONTEXT SUPPORTED GRAPHICS PROCESSOR
[patent_app_type] => utility
[patent_app_number] => 15/858704
[patent_app_country] => US
[patent_app_date] => 2017-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17224
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858704
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/858704 | Dynamic configuration of caches in a multi-context supported graphics processor | Dec 28, 2017 | Issued |
Array
(
[id] => 14539279
[patent_doc_number] => 20190205261
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-07-04
[patent_title] => SYSTEMS, METHODS, AND APPARATUSES FOR PATCHING PAGES
[patent_app_type] => utility
[patent_app_number] => 15/858262
[patent_app_country] => US
[patent_app_date] => 2017-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10725
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858262
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/858262 | SYSTEMS, METHODS, AND APPARATUSES FOR PATCHING PAGES | Dec 28, 2017 | Abandoned |