Search

Kalpit Parikh

Examiner (ID: 5326, Phone: (571)270-1173 , Office: P/2137 )

Most Active Art Unit
2137
Art Unit(s)
2137, 2187
Total Applications
688
Issued Applications
528
Pending Applications
42
Abandoned Applications
123

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20337845 [patent_doc_number] => 20250341965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-06 [patent_title] => MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/652875 [patent_app_country] => US [patent_app_date] => 2024-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4533 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652875 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/652875
MEMORY DEVICE AND OPERATION METHOD THEREOF May 1, 2024 Pending
Array ( [id] => 19362720 [patent_doc_number] => 20240264754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => SYSTEM AND METHOD FOR POWER MANAGEMENT IN SOLID STATE STORAGE SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/638815 [patent_app_country] => US [patent_app_date] => 2024-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18638815 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/638815
System and method for power management in solid state storage systems Apr 17, 2024 Issued
Array ( [id] => 20117292 [patent_doc_number] => 12366996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Command queuing [patent_app_type] => utility [patent_app_number] => 18/629460 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 1342 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629460 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629460
Command queuing Apr 7, 2024 Issued
Array ( [id] => 19514047 [patent_doc_number] => 20240345733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => MEMORY SYSTEM PROCEDURE DETECTION AND LATENCY REDUCTION [patent_app_type] => utility [patent_app_number] => 18/629685 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16183 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629685 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629685
MEMORY SYSTEM PROCEDURE DETECTION AND LATENCY REDUCTION Apr 7, 2024 Pending
Array ( [id] => 20228404 [patent_doc_number] => 12417055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => High-performance input buffer and memory device having the same [patent_app_type] => utility [patent_app_number] => 18/625987 [patent_app_country] => US [patent_app_date] => 2024-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 1312 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18625987 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/625987
High-performance input buffer and memory device having the same Apr 2, 2024 Issued
Array ( [id] => 20528909 [patent_doc_number] => 12547344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-10 [patent_title] => Corrective read of a memory device with reduced latency [patent_app_type] => utility [patent_app_number] => 18/441911 [patent_app_country] => US [patent_app_date] => 2024-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8467 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18441911 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/441911
Corrective read of a memory device with reduced latency Feb 13, 2024 Issued
Array ( [id] => 19219758 [patent_doc_number] => 20240184462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => ELECTRONIC DEVICE WITH STORAGE DEVICE DATA CONVERSION [patent_app_type] => utility [patent_app_number] => 18/440461 [patent_app_country] => US [patent_app_date] => 2024-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6860 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18440461 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/440461
ELECTRONIC DEVICE WITH STORAGE DEVICE DATA CONVERSION Feb 12, 2024 Pending
Array ( [id] => 20790025 [patent_doc_number] => 12663940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-23 [patent_title] => SDS local data path optimization system [patent_app_type] => utility [patent_app_number] => 18/423480 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8179 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18423480 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/423480
SDS local data path optimization system Jan 25, 2024 Issued
Array ( [id] => 19174611 [patent_doc_number] => 20240160585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => SHARING MEMORY AND I/O SERVICES BETWEEN NODES [patent_app_type] => utility [patent_app_number] => 18/419159 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419159 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419159
Sharing memory and I/O services between nodes Jan 21, 2024 Issued
Array ( [id] => 20123103 [patent_doc_number] => 20250238134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => Multiple Function Nonvolatile Memory Express (NVMe) Device (MFND) Performance Improvement By Over Reading [patent_app_type] => utility [patent_app_number] => 18/419013 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1264 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419013 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419013
Multiple Function Nonvolatile Memory Express (NVMe) Device (MFND) Performance Improvement By Over Reading Jan 21, 2024 Pending
Array ( [id] => 20689230 [patent_doc_number] => 12619379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-05 [patent_title] => Method and system for performing dynamic host memory buffer (HMB) management in PCIe based devices [patent_app_type] => utility [patent_app_number] => 18/416512 [patent_app_country] => US [patent_app_date] => 2024-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3406 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18416512 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/416512
Method and system for performing dynamic host memory buffer (HMB) management in PCIe based devices Jan 17, 2024 Issued
Array ( [id] => 19144580 [patent_doc_number] => 20240143497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => PROCESSING-IN-MEMORY (PIM) DEVICES [patent_app_type] => utility [patent_app_number] => 18/411586 [patent_app_country] => US [patent_app_date] => 2024-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 56802 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18411586 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/411586
PROCESSING-IN-MEMORY (PIM) DEVICES Jan 11, 2024 Pending
Array ( [id] => 19347173 [patent_doc_number] => 20240256136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => CONCURRENTLY WRITING LESS-DENSELY-PROGRAMMED AND MORE-DENSELY-PROGRAMMED MEMORY WITHOUT ADDITIONAL HARDWARE [patent_app_type] => utility [patent_app_number] => 18/408836 [patent_app_country] => US [patent_app_date] => 2024-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18408836 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/408836
Concurrently writing less-densely-programmed and more-densely-programmed memory without additional hardware Jan 9, 2024 Issued
Array ( [id] => 19320099 [patent_doc_number] => 20240241643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => CURRENT MANAGEMENT DURING DATA BURST OPERATIONS IN A MULTI-DIE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/407239 [patent_app_country] => US [patent_app_date] => 2024-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9888 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18407239 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/407239
CURRENT MANAGEMENT DURING DATA BURST OPERATIONS IN A MULTI-DIE MEMORY DEVICE Jan 7, 2024 Pending
Array ( [id] => 20828100 [patent_doc_number] => 12681667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-14 [patent_title] => Managing retention latency for memory devices of vehicle systems [patent_app_type] => utility [patent_app_number] => 18/405379 [patent_app_country] => US [patent_app_date] => 2024-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1229 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18405379 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/405379
Managing retention latency for memory devices of vehicle systems Jan 4, 2024 Issued
Array ( [id] => 20087340 [patent_doc_number] => 20250217276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => Gloal Memory Segmentation Adjustment [patent_app_type] => utility [patent_app_number] => 18/401644 [patent_app_country] => US [patent_app_date] => 2024-01-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18401644 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/401644
Global memory segmentation adjustment Dec 31, 2023 Issued
Array ( [id] => 19802406 [patent_doc_number] => 20250068331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => POLYHEDRON MODELS AND METHODS USING COMPUTATIONAL OPERATIONS FOR DISTRIBUTING DATA [patent_app_type] => utility [patent_app_number] => 18/394226 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11411 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18394226 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/394226
Polyhedron models and methods using computational operations for distributing data Dec 21, 2023 Issued
Array ( [id] => 20043029 [patent_doc_number] => 20250181251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => SYSTEM AND METHOD FOR UTILIZATION OF STORAGE DEVICES [patent_app_type] => utility [patent_app_number] => 18/529376 [patent_app_country] => US [patent_app_date] => 2023-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18529376 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/529376
SYSTEM AND METHOD FOR UTILIZATION OF STORAGE DEVICES Dec 4, 2023 Pending
Array ( [id] => 20109951 [patent_doc_number] => 12360672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Memory die with on-chip binary vector database search [patent_app_type] => utility [patent_app_number] => 18/526698 [patent_app_country] => US [patent_app_date] => 2023-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 12881 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526698 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/526698
Memory die with on-chip binary vector database search Nov 30, 2023 Issued
Array ( [id] => 20428130 [patent_doc_number] => 20250390220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-25 [patent_title] => ACCESS ACCELERATION SYSTEM FOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/879725 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18879725 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/879725
ACCESS ACCELERATION SYSTEM FOR STORAGE DEVICE Nov 19, 2023 Pending
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