Search

Kamini S. Shah

Supervisory Patent Examiner (ID: 9613, Phone: (571)272-2279 , Office: P/2123 )

Most Active Art Unit
2857
Art Unit(s)
2414, 2764, 2127, 2863, 2116, 2314, 2128, 2211, 2123, 2857, 2146, 2115, 2142
Total Applications
939
Issued Applications
692
Pending Applications
104
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17744444 [patent_doc_number] => 11392513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Graph-based data flow control system [patent_app_type] => utility [patent_app_number] => 17/071036 [patent_app_country] => US [patent_app_date] => 2020-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 14270 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17071036 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/071036
Graph-based data flow control system Oct 14, 2020 Issued
Array ( [id] => 16600237 [patent_doc_number] => 20210026768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => VIRTUAL NETWORK PRE-ARBITRATION FOR DEADLOCK AVOIDANCE AND ENHANCED PERFORMANCE [patent_app_type] => utility [patent_app_number] => 17/066650 [patent_app_country] => US [patent_app_date] => 2020-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25318 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17066650 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/066650
Virtual network pre-arbitration for deadlock avoidance and enhanced performance Oct 8, 2020 Issued
Array ( [id] => 18750559 [patent_doc_number] => 11809873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Selective use of branch prediction hints [patent_app_type] => utility [patent_app_number] => 17/033749 [patent_app_country] => US [patent_app_date] => 2020-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7164 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17033749 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/033749
Selective use of branch prediction hints Sep 25, 2020 Issued
Array ( [id] => 16802162 [patent_doc_number] => 10997106 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Inter-smartNIC virtual-link for control and datapath connectivity [patent_app_type] => utility [patent_app_number] => 17/028242 [patent_app_country] => US [patent_app_date] => 2020-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 17241 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17028242 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/028242
Inter-smartNIC virtual-link for control and datapath connectivity Sep 21, 2020 Issued
Array ( [id] => 16722173 [patent_doc_number] => 20210089320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => DYNAMIC ASSIGNMENT OF SPECIAL TASKS IN DISTRIBUTED NETWORKS [patent_app_type] => utility [patent_app_number] => 17/020470 [patent_app_country] => US [patent_app_date] => 2020-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17020470 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/020470
Dynamic assignment of special tasks in distributed networks Sep 13, 2020 Issued
Array ( [id] => 16729862 [patent_doc_number] => 20210097009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => APPARATUS AND METHOD FOR BURST MODE DATA STORAGE [patent_app_type] => utility [patent_app_number] => 17/017252 [patent_app_country] => US [patent_app_date] => 2020-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17017252 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/017252
Apparatus and method for burst mode data storage Sep 9, 2020 Issued
Array ( [id] => 17331513 [patent_doc_number] => 11221977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-11 [patent_title] => Daisy chain mode entry sequence [patent_app_type] => utility [patent_app_number] => 16/998050 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 11096 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998050 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998050
Daisy chain mode entry sequence Aug 19, 2020 Issued
Array ( [id] => 17430317 [patent_doc_number] => 20220058026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => EFFICIENT MULTIPLY-ACCUMULATION BASED ON SPARSE MATRIX [patent_app_type] => utility [patent_app_number] => 16/997460 [patent_app_country] => US [patent_app_date] => 2020-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997460 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/997460
Efficient multiply-accumulation based on sparse matrix Aug 18, 2020 Issued
Array ( [id] => 17121183 [patent_doc_number] => 11132318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-28 [patent_title] => Dynamic allocation of resources of a storage system utilizing single root input/output virtualization [patent_app_type] => utility [patent_app_number] => 16/996553 [patent_app_country] => US [patent_app_date] => 2020-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7458 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16996553 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/996553
Dynamic allocation of resources of a storage system utilizing single root input/output virtualization Aug 17, 2020 Issued
Array ( [id] => 17372138 [patent_doc_number] => 20220027190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => DISTRIBUTING INTERRUPT REQUEST TO BE HANDLED BY TARGET VIRTUAL PROCESSOR [patent_app_type] => utility [patent_app_number] => 16/934353 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13456 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934353 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/934353
Distributing interrupt request to be handled by target virtual processor Jul 20, 2020 Issued
Array ( [id] => 17786404 [patent_doc_number] => 11409527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Parallel processor in associative content addressable memory [patent_app_type] => utility [patent_app_number] => 16/929463 [patent_app_country] => US [patent_app_date] => 2020-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9997 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16929463 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/929463
Parallel processor in associative content addressable memory Jul 14, 2020 Issued
Array ( [id] => 16994101 [patent_doc_number] => 20210232521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => SYSTEM-ON-CHIPS AND METHODS OF CONTROLLING RESET OF SYSTEM-ON-CHIPS [patent_app_type] => utility [patent_app_number] => 16/929260 [patent_app_country] => US [patent_app_date] => 2020-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10837 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16929260 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/929260
System-on-chips and methods of controlling reset of system-on-chips Jul 14, 2020 Issued
Array ( [id] => 17283159 [patent_doc_number] => 11200188 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-14 [patent_title] => Operating system agnostic wireless multimedia dongle [patent_app_type] => utility [patent_app_number] => 16/926332 [patent_app_country] => US [patent_app_date] => 2020-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8515 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16926332 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/926332
Operating system agnostic wireless multimedia dongle Jul 9, 2020 Issued
Array ( [id] => 17379818 [patent_doc_number] => 11237834 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Memory device, access controller thereof and method for accessing memory device [patent_app_type] => utility [patent_app_number] => 16/923107 [patent_app_country] => US [patent_app_date] => 2020-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10479 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 363 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16923107 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/923107
Memory device, access controller thereof and method for accessing memory device Jul 7, 2020 Issued
Array ( [id] => 17194960 [patent_doc_number] => 11163717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Reduced pin count interface [patent_app_type] => utility [patent_app_number] => 16/921498 [patent_app_country] => US [patent_app_date] => 2020-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 19112 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16921498 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/921498
Reduced pin count interface Jul 5, 2020 Issued
Array ( [id] => 19137266 [patent_doc_number] => 11972230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Matrix transpose and multiply [patent_app_type] => utility [patent_app_number] => 16/914318 [patent_app_country] => US [patent_app_date] => 2020-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 48 [patent_no_of_words] => 27014 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16914318 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/914318
Matrix transpose and multiply Jun 26, 2020 Issued
Array ( [id] => 17316970 [patent_doc_number] => 20210406019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => APPARATUSES, METHODS, AND SYSTEMS FOR INSTRUCTIONS FOR OPERATING SYSTEM TRANSPARENT INSTRUCTION STATE MANAGEMENT OF NEW INSTRUCTIONS FOR APPLICATION THREADS [patent_app_type] => utility [patent_app_number] => 16/914343 [patent_app_country] => US [patent_app_date] => 2020-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16914343 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/914343
Apparatuses, methods, and systems for instructions for operating system transparent instruction state management of new instructions for application threads Jun 26, 2020 Issued
Array ( [id] => 17572821 [patent_doc_number] => 11321089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Instruction set architecture based and automatic load tracking for opportunistic re-steer of data-dependent flaky branches [patent_app_type] => utility [patent_app_number] => 16/914338 [patent_app_country] => US [patent_app_date] => 2020-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 28 [patent_no_of_words] => 22632 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16914338 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/914338
Instruction set architecture based and automatic load tracking for opportunistic re-steer of data-dependent flaky branches Jun 26, 2020 Issued
Array ( [id] => 17294091 [patent_doc_number] => 20210389930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => BIT STRING ACCUMULATION IN MULTIPLE REGISTERS [patent_app_type] => utility [patent_app_number] => 16/901646 [patent_app_country] => US [patent_app_date] => 2020-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16901646 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/901646
Bit string accumulation in multiple registers Jun 14, 2020 Issued
Array ( [id] => 16844684 [patent_doc_number] => 11016769 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-25 [patent_title] => Method and apparatus for processing information [patent_app_type] => utility [patent_app_number] => 16/890665 [patent_app_country] => US [patent_app_date] => 2020-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7533 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16890665 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/890665
Method and apparatus for processing information Jun 1, 2020 Issued
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