Search

Kamini S. Shah

Supervisory Patent Examiner (ID: 9613, Phone: (571)272-2279 , Office: P/2123 )

Most Active Art Unit
2857
Art Unit(s)
2414, 2764, 2127, 2863, 2116, 2314, 2128, 2211, 2123, 2857, 2146, 2115, 2142
Total Applications
939
Issued Applications
692
Pending Applications
104
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15353699 [patent_doc_number] => 20200014741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => SYSTEM AND METHOD FOR DEVICE AUDIO [patent_app_type] => utility [patent_app_number] => 16/503230 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10513 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503230 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/503230
System and method for device audio Jul 2, 2019 Issued
Array ( [id] => 17062370 [patent_doc_number] => 11106976 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Neural network output layer for machine learning [patent_app_type] => utility [patent_app_number] => 16/459731 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 18586 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459731 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/459731
Neural network output layer for machine learning Jul 1, 2019 Issued
Array ( [id] => 17091594 [patent_doc_number] => 11119783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Centralized automation system for resource management [patent_app_type] => utility [patent_app_number] => 16/458154 [patent_app_country] => US [patent_app_date] => 2019-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11546 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16458154 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/458154
Centralized automation system for resource management Jun 29, 2019 Issued
Array ( [id] => 16543294 [patent_doc_number] => 20200409709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => APPARATUSES, METHODS, AND SYSTEMS FOR TIME-MULTIPLEXING IN A CONFIGURABLE SPATIAL ACCELERATOR [patent_app_type] => utility [patent_app_number] => 16/458032 [patent_app_country] => US [patent_app_date] => 2019-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 88254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16458032 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/458032
APPARATUSES, METHODS, AND SYSTEMS FOR TIME-MULTIPLEXING IN A CONFIGURABLE SPATIAL ACCELERATOR Jun 28, 2019 Abandoned
Array ( [id] => 16802006 [patent_doc_number] => 10996950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Apparatuses and methods involving selective disablement of side effects caused by accessing register sets [patent_app_type] => utility [patent_app_number] => 16/456467 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 11333 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456467 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/456467
Apparatuses and methods involving selective disablement of side effects caused by accessing register sets Jun 27, 2019 Issued
Array ( [id] => 14966961 [patent_doc_number] => 20190310959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => BIMODAL PHY FOR LOW LATENCY IN HIGH SPEED INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 16/446996 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446996 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446996
Bimodal phy for low latency in high speed interconnects Jun 19, 2019 Issued
Array ( [id] => 16551804 [patent_doc_number] => 10884964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Multichip package with protocol-configurable data paths [patent_app_type] => utility [patent_app_number] => 16/436771 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5745 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436771 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/436771
Multichip package with protocol-configurable data paths Jun 9, 2019 Issued
Array ( [id] => 15257691 [patent_doc_number] => 20190377579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => MICROPROCESSOR, POWER SUPPLY CONTROL IC, AND POWER SUPPLY [patent_app_type] => utility [patent_app_number] => 16/433115 [patent_app_country] => US [patent_app_date] => 2019-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4142 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16433115 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/433115
Microprocessor, power supply control IC, and power supply Jun 5, 2019 Issued
Array ( [id] => 16363133 [patent_doc_number] => 20200319884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => Hardware Support for OS-Centric Performance Monitoring with Data Collection [patent_app_type] => utility [patent_app_number] => 16/431124 [patent_app_country] => US [patent_app_date] => 2019-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19084 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16431124 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/431124
Hardware support for OS-centric performance monitoring with data collection Jun 3, 2019 Issued
Array ( [id] => 16879815 [patent_doc_number] => 11029962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Execution unit [patent_app_type] => utility [patent_app_number] => 16/428901 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 16329 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16428901 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/428901
Execution unit May 30, 2019 Issued
Array ( [id] => 16431400 [patent_doc_number] => 10831482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-10 [patent_title] => Arithmetic processing apparatus and control method for arithmetic processing apparatus [patent_app_type] => utility [patent_app_number] => 16/426816 [patent_app_country] => US [patent_app_date] => 2019-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11047 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16426816 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/426816
Arithmetic processing apparatus and control method for arithmetic processing apparatus May 29, 2019 Issued
Array ( [id] => 16950183 [patent_doc_number] => 20210208875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => MODULUS CALCULATION THAT LEVERAGES COMPUTER ARCHITECTURE AND/OR OPERAND CLUSTERING [patent_app_type] => utility [patent_app_number] => 17/059075 [patent_app_country] => US [patent_app_date] => 2019-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10975 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17059075 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/059075
Modulus calculation that leverages computer architecture and/or operand clustering May 29, 2019 Issued
Array ( [id] => 16478125 [patent_doc_number] => 10853072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Arithmetic processing apparatus and method of controlling arithmetic processing apparatus [patent_app_type] => utility [patent_app_number] => 16/423688 [patent_app_country] => US [patent_app_date] => 2019-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11674 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16423688 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/423688
Arithmetic processing apparatus and method of controlling arithmetic processing apparatus May 27, 2019 Issued
Array ( [id] => 15953027 [patent_doc_number] => 10664421 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-26 [patent_title] => Reordering responses in a high performance on-chip network [patent_app_type] => utility [patent_app_number] => 16/422417 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 14356 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16422417 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/422417
Reordering responses in a high performance on-chip network May 23, 2019 Issued
Array ( [id] => 16470257 [patent_doc_number] => 20200371794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => VECTOR FLOATING-POINT CLASSIFICATION [patent_app_type] => utility [patent_app_number] => 16/422688 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10923 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16422688 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/422688
Vector floating-point classification May 23, 2019 Issued
Array ( [id] => 15523219 [patent_doc_number] => 10568227 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Expansion module system [patent_app_type] => utility [patent_app_number] => 16/372820 [patent_app_country] => US [patent_app_date] => 2019-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2438 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16372820 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/372820
Expansion module system Apr 1, 2019 Issued
Array ( [id] => 16592480 [patent_doc_number] => 10901742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Apparatus and method for making predictions for instruction flow changing instructions [patent_app_type] => utility [patent_app_number] => 16/364570 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 11546 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16364570 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/364570
Apparatus and method for making predictions for instruction flow changing instructions Mar 25, 2019 Issued
Array ( [id] => 16551590 [patent_doc_number] => 10884749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Control of speculative demand loads [patent_app_type] => utility [patent_app_number] => 16/364928 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7356 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16364928 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/364928
Control of speculative demand loads Mar 25, 2019 Issued
Array ( [id] => 16551577 [patent_doc_number] => 10884736 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-01-05 [patent_title] => Method and apparatus for a low energy programmable vector processing unit for neural networks backend processing [patent_app_type] => utility [patent_app_number] => 16/355586 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7959 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16355586 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/355586
Method and apparatus for a low energy programmable vector processing unit for neural networks backend processing Mar 14, 2019 Issued
Array ( [id] => 16314472 [patent_doc_number] => 20200293210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => ALLOCATING STORAGE SYSTEM PORTS TO VIRTUAL MACHINES [patent_app_type] => utility [patent_app_number] => 16/353123 [patent_app_country] => US [patent_app_date] => 2019-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5380 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16353123 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/353123
Allocating storage system ports to virtual machines Mar 13, 2019 Issued
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