Search

Kamini S. Shah

Supervisory Patent Examiner (ID: 9613, Phone: (571)272-2279 , Office: P/2123 )

Most Active Art Unit
2857
Art Unit(s)
2414, 2764, 2127, 2863, 2116, 2314, 2128, 2211, 2123, 2857, 2146, 2115, 2142
Total Applications
939
Issued Applications
692
Pending Applications
104
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14149397 [patent_doc_number] => 10255079 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Integrated circuit device including wake-up control circuit and electronic device including the same [patent_app_type] => utility [patent_app_number] => 15/394518 [patent_app_country] => US [patent_app_date] => 2016-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9281 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15394518 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/394518
Integrated circuit device including wake-up control circuit and electronic device including the same Dec 28, 2016 Issued
Array ( [id] => 14669511 [patent_doc_number] => 10372657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Bimodal PHY for low latency in high speed interconnects [patent_app_type] => utility [patent_app_number] => 15/390648 [patent_app_country] => US [patent_app_date] => 2016-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 12876 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15390648 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/390648
Bimodal PHY for low latency in high speed interconnects Dec 25, 2016 Issued
Array ( [id] => 12027777 [patent_doc_number] => 20170317877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'SEMI-AUTOMATED CONFIGURATION OF A LOW-LATENCY MULTIMEDIA PLAYBACK SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/379441 [patent_app_country] => US [patent_app_date] => 2016-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10435 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15379441 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/379441
Semi-automated configuration of a low-latency multimedia playback system Dec 13, 2016 Issued
Array ( [id] => 13737489 [patent_doc_number] => 20180373212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => INTERFACE-CONTROL DEVICE AND RELATED METHOD [patent_app_type] => utility [patent_app_number] => 15/747069 [patent_app_country] => US [patent_app_date] => 2016-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15747069 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/747069
INTERFACE-CONTROL DEVICE AND RELATED METHOD Dec 12, 2016 Abandoned
Array ( [id] => 11693105 [patent_doc_number] => 20170168820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'DATA PROCESSING' [patent_app_type] => utility [patent_app_number] => 15/371670 [patent_app_country] => US [patent_app_date] => 2016-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8184 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15371670 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/371670
Data processing Dec 6, 2016 Issued
Array ( [id] => 15106567 [patent_doc_number] => 10474609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Information processing apparatus, control method for information processing apparatus, and storage medium [patent_app_type] => utility [patent_app_number] => 15/292979 [patent_app_country] => US [patent_app_date] => 2016-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6068 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15292979 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/292979
Information processing apparatus, control method for information processing apparatus, and storage medium Oct 12, 2016 Issued
Array ( [id] => 15106567 [patent_doc_number] => 10474609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Information processing apparatus, control method for information processing apparatus, and storage medium [patent_app_type] => utility [patent_app_number] => 15/292979 [patent_app_country] => US [patent_app_date] => 2016-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6068 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15292979 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/292979
Information processing apparatus, control method for information processing apparatus, and storage medium Oct 12, 2016 Issued
Array ( [id] => 15106567 [patent_doc_number] => 10474609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Information processing apparatus, control method for information processing apparatus, and storage medium [patent_app_type] => utility [patent_app_number] => 15/292979 [patent_app_country] => US [patent_app_date] => 2016-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6068 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15292979 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/292979
Information processing apparatus, control method for information processing apparatus, and storage medium Oct 12, 2016 Issued
Array ( [id] => 15106567 [patent_doc_number] => 10474609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Information processing apparatus, control method for information processing apparatus, and storage medium [patent_app_type] => utility [patent_app_number] => 15/292979 [patent_app_country] => US [patent_app_date] => 2016-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6068 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15292979 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/292979
Information processing apparatus, control method for information processing apparatus, and storage medium Oct 12, 2016 Issued
Array ( [id] => 12628995 [patent_doc_number] => 20180101495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-12 [patent_title] => ENCODING FOR MULTI-DEVICE SYNCHRONIZATION OF DEVICES [patent_app_type] => utility [patent_app_number] => 15/291670 [patent_app_country] => US [patent_app_date] => 2016-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7339 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15291670 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/291670
Encoding for multi-device synchronization of devices Oct 11, 2016 Issued
Array ( [id] => 14489597 [patent_doc_number] => 10331586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Nonvolatile memory device for providing fast booting and system including the same [patent_app_type] => utility [patent_app_number] => 15/287867 [patent_app_country] => US [patent_app_date] => 2016-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5980 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15287867 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/287867
Nonvolatile memory device for providing fast booting and system including the same Oct 6, 2016 Issued
Array ( [id] => 13226407 [patent_doc_number] => 10126979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Bus encoding using metadata [patent_app_type] => utility [patent_app_number] => 15/285055 [patent_app_country] => US [patent_app_date] => 2016-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7556 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15285055 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/285055
Bus encoding using metadata Oct 3, 2016 Issued
Array ( [id] => 12180507 [patent_doc_number] => 20180039443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-08 [patent_title] => 'SYSTEM AND METHOD FOR CONTROLLING A PROGRAMMABLE DEDUPLICATION RATIO FOR A MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/285437 [patent_app_country] => US [patent_app_date] => 2016-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4466 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15285437 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/285437
System and method for controlling a programmable deduplication ratio for a memory system Oct 3, 2016 Issued
Array ( [id] => 13807319 [patent_doc_number] => 10180926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-15 [patent_title] => Controlling data storage devices across multiple servers [patent_app_type] => utility [patent_app_number] => 15/283831 [patent_app_country] => US [patent_app_date] => 2016-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15283831 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/283831
Controlling data storage devices across multiple servers Oct 2, 2016 Issued
Array ( [id] => 12986449 [patent_doc_number] => 20170344512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => REDUCED PIN COUNT INTERFACE [patent_app_type] => utility [patent_app_number] => 15/283310 [patent_app_country] => US [patent_app_date] => 2016-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15283310 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/283310
Reduced pin count interface Sep 30, 2016 Issued
Array ( [id] => 13974601 [patent_doc_number] => 10216657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-26 [patent_title] => Extended platform with additional memory module slots per CPU socket and configured for increased performance [patent_app_type] => utility [patent_app_number] => 15/283186 [patent_app_country] => US [patent_app_date] => 2016-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 7915 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15283186 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/283186
Extended platform with additional memory module slots per CPU socket and configured for increased performance Sep 29, 2016 Issued
Array ( [id] => 11365981 [patent_doc_number] => 20170003962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'INSTRUCTION AND LOGIC TO PROVIDE VECTOR HORIZONTAL MAJORITY VOTING FUNCTIONALITY' [patent_app_type] => utility [patent_app_number] => 15/267668 [patent_app_country] => US [patent_app_date] => 2016-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 18268 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15267668 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/267668
Instruction and logic to provide vector horizontal majority voting functionality Sep 15, 2016 Issued
Array ( [id] => 11365981 [patent_doc_number] => 20170003962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'INSTRUCTION AND LOGIC TO PROVIDE VECTOR HORIZONTAL MAJORITY VOTING FUNCTIONALITY' [patent_app_type] => utility [patent_app_number] => 15/267668 [patent_app_country] => US [patent_app_date] => 2016-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 18268 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15267668 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/267668
Instruction and logic to provide vector horizontal majority voting functionality Sep 15, 2016 Issued
Array ( [id] => 11365981 [patent_doc_number] => 20170003962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'INSTRUCTION AND LOGIC TO PROVIDE VECTOR HORIZONTAL MAJORITY VOTING FUNCTIONALITY' [patent_app_type] => utility [patent_app_number] => 15/267668 [patent_app_country] => US [patent_app_date] => 2016-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 18268 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15267668 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/267668
Instruction and logic to provide vector horizontal majority voting functionality Sep 15, 2016 Issued
Array ( [id] => 11365981 [patent_doc_number] => 20170003962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'INSTRUCTION AND LOGIC TO PROVIDE VECTOR HORIZONTAL MAJORITY VOTING FUNCTIONALITY' [patent_app_type] => utility [patent_app_number] => 15/267668 [patent_app_country] => US [patent_app_date] => 2016-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 18268 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15267668 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/267668
Instruction and logic to provide vector horizontal majority voting functionality Sep 15, 2016 Issued
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