Search

Kamini S. Shah

Supervisory Patent Examiner (ID: 9613, Phone: (571)272-2279 , Office: P/2123 )

Most Active Art Unit
2857
Art Unit(s)
2414, 2764, 2127, 2863, 2116, 2314, 2128, 2211, 2123, 2857, 2146, 2115, 2142
Total Applications
939
Issued Applications
692
Pending Applications
104
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20188601 [patent_doc_number] => 12399713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Multiplication hardware block with adaptive fidelity control system [patent_app_type] => utility [patent_app_number] => 17/955539 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5220 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955539 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955539
Multiplication hardware block with adaptive fidelity control system Sep 28, 2022 Issued
Array ( [id] => 19243371 [patent_doc_number] => 12013810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Non-homogeneous chiplets [patent_app_type] => utility [patent_app_number] => 17/956013 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5300 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956013 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/956013
Non-homogeneous chiplets Sep 28, 2022 Issued
Array ( [id] => 19811456 [patent_doc_number] => 12242850 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-03-04 [patent_title] => Data processing and transmission using hardware serialization and deserialization functions [patent_app_type] => utility [patent_app_number] => 17/955307 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12504 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955307 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955307
Data processing and transmission using hardware serialization and deserialization functions Sep 27, 2022 Issued
Array ( [id] => 18422408 [patent_doc_number] => 20230176872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => ARITHMETIC PROCESSING DEVICE AND ARITHMETIC PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 17/953373 [patent_app_country] => US [patent_app_date] => 2022-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7064 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17953373 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/953373
ARITHMETIC PROCESSING DEVICE AND ARITHMETIC PROCESSING METHOD Sep 26, 2022 Abandoned
Array ( [id] => 18531928 [patent_doc_number] => 20230237000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => DETECTING LOAD CAPACITANCE ON SERIAL COMMUNICATION DATA LINES [patent_app_type] => utility [patent_app_number] => 17/935472 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17935472 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/935472
DETECTING LOAD CAPACITANCE ON SERIAL COMMUNICATION DATA LINES Sep 25, 2022 Abandoned
Array ( [id] => 19228730 [patent_doc_number] => 12008368 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Programmable compute engine having transpose operations [patent_app_type] => utility [patent_app_number] => 17/934147 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 19514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934147 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934147
Programmable compute engine having transpose operations Sep 20, 2022 Issued
Array ( [id] => 19039329 [patent_doc_number] => 20240089144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => AUTOMOTIVE AUDIO BUS DATA COMMUNICATION PROTOCOL [patent_app_type] => utility [patent_app_number] => 17/940745 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10264 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17940745 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/940745
Automotive audio bus data communication protocol Sep 7, 2022 Issued
Array ( [id] => 18594192 [patent_doc_number] => 11743109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Link layer communication by multiple link layer encodings for computer buses [patent_app_type] => utility [patent_app_number] => 17/898825 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12169 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17898825 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/898825
Link layer communication by multiple link layer encodings for computer buses Aug 29, 2022 Issued
Array ( [id] => 18095711 [patent_doc_number] => 20220414052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => Multi-Core Processor, Multi-Core Processor Processing Method, and Related Device [patent_app_type] => utility [patent_app_number] => 17/897295 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19280 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17897295 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/897295
Multi-core processor, multi-core processor processing method, and related device Aug 28, 2022 Issued
Array ( [id] => 18096704 [patent_doc_number] => 20220415045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => METHODS AND SYSTEMS FOR IMAGE PROCESSING [patent_app_type] => utility [patent_app_number] => 17/823079 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28472 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17823079 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/823079
Methods and systems for image processing Aug 28, 2022 Issued
Array ( [id] => 18981986 [patent_doc_number] => 11907159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Method for representing a distributed computing system by graph embedding [patent_app_type] => utility [patent_app_number] => 17/891095 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5133 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/891095
Method for representing a distributed computing system by graph embedding Aug 17, 2022 Issued
Array ( [id] => 18889998 [patent_doc_number] => 11868771 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => System and method for divide-and-conquer checkpointing [patent_app_type] => utility [patent_app_number] => 17/818396 [patent_app_country] => US [patent_app_date] => 2022-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 27 [patent_no_of_words] => 13911 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17818396 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/818396
System and method for divide-and-conquer checkpointing Aug 8, 2022 Issued
Array ( [id] => 18622894 [patent_doc_number] => 11755941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Geometry-based compression for quantum computing devices [patent_app_type] => utility [patent_app_number] => 17/818137 [patent_app_country] => US [patent_app_date] => 2022-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 14560 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17818137 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/818137
Geometry-based compression for quantum computing devices Aug 7, 2022 Issued
Array ( [id] => 18022743 [patent_doc_number] => 20220374242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => PIPELINE MERGING IN A CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/880426 [patent_app_country] => US [patent_app_date] => 2022-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13569 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880426 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880426
Pipeline merging in a circuit Aug 2, 2022 Issued
Array ( [id] => 18941723 [patent_doc_number] => 20240036862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => PACKET PROCESSING IN A DISTRIBUTED DIRECTED ACYCLIC GRAPH [patent_app_type] => utility [patent_app_number] => 17/878646 [patent_app_country] => US [patent_app_date] => 2022-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878646 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/878646
PACKET PROCESSING IN A DISTRIBUTED DIRECTED ACYCLIC GRAPH Jul 31, 2022 Abandoned
Array ( [id] => 19293610 [patent_doc_number] => 12032964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Speculative execution of dataflow program nodes [patent_app_type] => utility [patent_app_number] => 17/815904 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15212 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815904 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815904
Speculative execution of dataflow program nodes Jul 27, 2022 Issued
Array ( [id] => 19506490 [patent_doc_number] => 12117910 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Virtual device composition in a scalable input/output (I/O) virtualization (S-IOV) architecture [patent_app_type] => utility [patent_app_number] => 17/868596 [patent_app_country] => US [patent_app_date] => 2022-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14632 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868596 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868596
Virtual device composition in a scalable input/output (I/O) virtualization (S-IOV) architecture Jul 18, 2022 Issued
Array ( [id] => 18904519 [patent_doc_number] => 20240020004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => LCS DATA COMPRESSION/DECOMPRESSION SYSTEM [patent_app_type] => utility [patent_app_number] => 17/864118 [patent_app_country] => US [patent_app_date] => 2022-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16875 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17864118 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/864118
LCS data compression/decompression system Jul 12, 2022 Issued
Array ( [id] => 19506934 [patent_doc_number] => 12118357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Encoded data dependency matrix for power efficiency scheduling [patent_app_type] => utility [patent_app_number] => 17/855621 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5982 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855621 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855621
Encoded data dependency matrix for power efficiency scheduling Jun 29, 2022 Issued
Array ( [id] => 19705595 [patent_doc_number] => 12199645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Parallel-to-serial conversion circuit, parallel-to-serial conversion circuit layout, and memory [patent_app_type] => utility [patent_app_number] => 17/849942 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4824 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849942 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849942
Parallel-to-serial conversion circuit, parallel-to-serial conversion circuit layout, and memory Jun 26, 2022 Issued
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