Search

Kamran Afshar

Supervisory Patent Examiner (ID: 4027, Phone: (571)272-7796 , Office: P/2646 )

Most Active Art Unit
2617
Art Unit(s)
2125, 2682, 2681, 2646, 2617
Total Applications
712
Issued Applications
512
Pending Applications
77
Abandoned Applications
124

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 837302 [patent_doc_number] => 07394119 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-01 [patent_title] => 'Metal oxide semiconductor (MOS) type semiconductor device and having improved stability against soft errors' [patent_app_type] => utility [patent_app_number] => 10/811107 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 4308 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/394/07394119.pdf [firstpage_image] =>[orig_patent_app_number] => 10811107 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/811107
Metal oxide semiconductor (MOS) type semiconductor device and having improved stability against soft errors Mar 25, 2004 Issued
Array ( [id] => 6955697 [patent_doc_number] => 20050212067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-29 [patent_title] => 'Microelectromechanical devices with lubricants and getters formed thereon' [patent_app_type] => utility [patent_app_number] => 10/810076 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3433 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20050212067.pdf [firstpage_image] =>[orig_patent_app_number] => 10810076 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/810076
Microelectromechanical devices with lubricants and getters formed thereon Mar 25, 2004 Abandoned
Array ( [id] => 453993 [patent_doc_number] => 07247929 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-24 [patent_title] => 'Molded semiconductor device with heat conducting members' [patent_app_type] => utility [patent_app_number] => 10/808567 [patent_app_country] => US [patent_app_date] => 2004-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4942 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/247/07247929.pdf [firstpage_image] =>[orig_patent_app_number] => 10808567 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/808567
Molded semiconductor device with heat conducting members Mar 24, 2004 Issued
Array ( [id] => 6988656 [patent_doc_number] => 20050087787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-28 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/807327 [patent_app_country] => US [patent_app_date] => 2004-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3754 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20050087787.pdf [firstpage_image] =>[orig_patent_app_number] => 10807327 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/807327
Semiconductor device and manufacturing method thereof Mar 23, 2004 Abandoned
Array ( [id] => 7234765 [patent_doc_number] => 20040256659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'MOS-gated transistor with improved UIS capability' [patent_app_type] => new [patent_app_number] => 10/807917 [patent_app_country] => US [patent_app_date] => 2004-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5828 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20040256659.pdf [firstpage_image] =>[orig_patent_app_number] => 10807917 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/807917
MOS-gated transistor with improved UIS capability Mar 22, 2004 Abandoned
Array ( [id] => 191329 [patent_doc_number] => 07642642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-05 [patent_title] => 'Microcap wafer bonding apparatus' [patent_app_type] => utility [patent_app_number] => 10/807417 [patent_app_country] => US [patent_app_date] => 2004-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2187 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/642/07642642.pdf [firstpage_image] =>[orig_patent_app_number] => 10807417 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/807417
Microcap wafer bonding apparatus Mar 22, 2004 Issued
Array ( [id] => 7108533 [patent_doc_number] => 20050205986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Module with integrated active substrate and passive substrate' [patent_app_type] => utility [patent_app_number] => 10/804737 [patent_app_country] => US [patent_app_date] => 2004-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3767 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20050205986.pdf [firstpage_image] =>[orig_patent_app_number] => 10804737 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/804737
Module with integrated active substrate and passive substrate Mar 17, 2004 Abandoned
Array ( [id] => 7108538 [patent_doc_number] => 20050205991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'System and method of heat dissipation in semiconductor devices' [patent_app_type] => utility [patent_app_number] => 10/801475 [patent_app_country] => US [patent_app_date] => 2004-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2513 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20050205991.pdf [firstpage_image] =>[orig_patent_app_number] => 10801475 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/801475
System for heat dissipation in semiconductor devices Mar 15, 2004 Issued
Array ( [id] => 7238585 [patent_doc_number] => 20050140298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Alignment mark and plasma display panel comprising the alignment mark' [patent_app_type] => utility [patent_app_number] => 10/797867 [patent_app_country] => US [patent_app_date] => 2004-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2448 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20050140298.pdf [firstpage_image] =>[orig_patent_app_number] => 10797867 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/797867
Alignment mark and plasma display panel comprising the alignment mark Mar 9, 2004 Issued
Array ( [id] => 7016469 [patent_doc_number] => 20050218486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Semiconductor BGA package having a segmented voltage plane and method of making' [patent_app_type] => utility [patent_app_number] => 10/797647 [patent_app_country] => US [patent_app_date] => 2004-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4444 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20050218486.pdf [firstpage_image] =>[orig_patent_app_number] => 10797647 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/797647
Semiconductor BGA package having a segmented voltage plane and method of making Mar 9, 2004 Issued
Array ( [id] => 7249824 [patent_doc_number] => 20040238827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/795445 [patent_app_country] => US [patent_app_date] => 2004-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 16471 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20040238827.pdf [firstpage_image] =>[orig_patent_app_number] => 10795445 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/795445
Semiconductor device having EL element, integrated circuit and adhesive layer therebetween Mar 8, 2004 Issued
Array ( [id] => 7022967 [patent_doc_number] => 20050017361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Post-passivation metal scheme on an IC chip with copper interconnection' [patent_app_type] => utility [patent_app_number] => 10/796427 [patent_app_country] => US [patent_app_date] => 2004-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3255 [patent_no_of_claims] => 68 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20050017361.pdf [firstpage_image] =>[orig_patent_app_number] => 10796427 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/796427
Wirebond pad for semiconductor chip or wafer Mar 8, 2004 Issued
Array ( [id] => 7406694 [patent_doc_number] => 20040175909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/791777 [patent_app_country] => US [patent_app_date] => 2004-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9452 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20040175909.pdf [firstpage_image] =>[orig_patent_app_number] => 10791777 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/791777
Semiconductor device and method for fabricating the same Mar 3, 2004 Abandoned
Array ( [id] => 7407423 [patent_doc_number] => 20040227222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-18 [patent_title] => 'Stacked semiconductor package' [patent_app_type] => new [patent_app_number] => 10/787127 [patent_app_country] => US [patent_app_date] => 2004-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6399 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20040227222.pdf [firstpage_image] =>[orig_patent_app_number] => 10787127 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/787127
Stacked semiconductor package Feb 26, 2004 Abandoned
Array ( [id] => 7334247 [patent_doc_number] => 20040188849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Semiconductor device and pattern generating method' [patent_app_type] => new [patent_app_number] => 10/786027 [patent_app_country] => US [patent_app_date] => 2004-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5389 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20040188849.pdf [firstpage_image] =>[orig_patent_app_number] => 10786027 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/786027
Semiconductor device and pattern generating method Feb 25, 2004 Abandoned
Array ( [id] => 415539 [patent_doc_number] => 07279724 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-09 [patent_title] => 'Ceramic substrate for a light emitting diode where the substrate incorporates ESD protection' [patent_app_type] => utility [patent_app_number] => 10/787657 [patent_app_country] => US [patent_app_date] => 2004-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2957 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/279/07279724.pdf [firstpage_image] =>[orig_patent_app_number] => 10787657 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/787657
Ceramic substrate for a light emitting diode where the substrate incorporates ESD protection Feb 24, 2004 Issued
Array ( [id] => 7235601 [patent_doc_number] => 20040157450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Waferlevel method for direct bumping on copper pads in integrated circuits' [patent_app_type] => new [patent_app_number] => 10/773864 [patent_app_country] => US [patent_app_date] => 2004-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4198 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20040157450.pdf [firstpage_image] =>[orig_patent_app_number] => 10773864 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/773864
Waferlevel method for direct bumping on copper pads in integrated circuits Feb 8, 2004 Abandoned
Array ( [id] => 7291842 [patent_doc_number] => 20040212080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => '[CHIP PACKAGE STRUCTURE AND PROCESS FOR FABRICATING THE SAME]' [patent_app_type] => new [patent_app_number] => 10/707687 [patent_app_country] => US [patent_app_date] => 2004-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6558 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20040212080.pdf [firstpage_image] =>[orig_patent_app_number] => 10707687 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/707687
[CHIP PACKAGE STRUCTURE AND PROCESS FOR FABRICATING THE SAME] Jan 4, 2004 Abandoned
Array ( [id] => 7260135 [patent_doc_number] => 20040150041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Lateral high-breakdown-voltage transistor' [patent_app_type] => new [patent_app_number] => 10/748187 [patent_app_country] => US [patent_app_date] => 2003-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9522 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20040150041.pdf [firstpage_image] =>[orig_patent_app_number] => 10748187 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/748187
Lateral high-breakdown-voltage transistor having drain contact region Dec 30, 2003 Issued
Array ( [id] => 7008362 [patent_doc_number] => 20050062078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'CMOS image sensor and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/747307 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4810 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20050062078.pdf [firstpage_image] =>[orig_patent_app_number] => 10747307 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/747307
CMOS image sensor having impurity diffusion region separated from isolation region Dec 29, 2003 Issued
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