
Kamran Afshar
Supervisory Patent Examiner (ID: 4027, Phone: (571)272-7796 , Office: P/2646 )
| Most Active Art Unit | 2617 |
| Art Unit(s) | 2125, 2682, 2681, 2646, 2617 |
| Total Applications | 712 |
| Issued Applications | 512 |
| Pending Applications | 77 |
| Abandoned Applications | 124 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6718680
[patent_doc_number] => 20030052367
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-20
[patent_title] => 'APPARATUS AND METHOD FOR IMPROVED POWER BUS ESD PROTECTION'
[patent_app_type] => new
[patent_app_number] => 09/946247
[patent_app_country] => US
[patent_app_date] => 2001-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7617
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0052/20030052367.pdf
[firstpage_image] =>[orig_patent_app_number] => 09946247
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/946247 | Apparatus and method for improved power bus ESD protection | Sep 4, 2001 | Issued |
Array
(
[id] => 6365889
[patent_doc_number] => 20020117697
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-29
[patent_title] => 'Avalanche photo-diode and fabrication method thereof'
[patent_app_type] => new
[patent_app_number] => 09/942737
[patent_app_country] => US
[patent_app_date] => 2001-08-31
[patent_effective_date] => 0000-00-00
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[patent_words_short_claim] => 86
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0117/20020117697.pdf
[firstpage_image] =>[orig_patent_app_number] => 09942737
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/942737 | Burying type avalanche photodiode and fabrication method thereof | Aug 30, 2001 | Issued |
Array
(
[id] => 6748079
[patent_doc_number] => 20030042599
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-06
[patent_title] => 'ANGELED EDGE CONNECTIONS FOR MULTICHIP STRUCTURES'
[patent_app_type] => new
[patent_app_number] => 09/944957
[patent_app_country] => US
[patent_app_date] => 2001-08-30
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0042/20030042599.pdf
[firstpage_image] =>[orig_patent_app_number] => 09944957
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/944957 | Angled edge connections for multichip structures | Aug 29, 2001 | Issued |
Array
(
[id] => 1284433
[patent_doc_number] => 06642579
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-11-04
[patent_title] => 'Method of reducing the extrinsic body resistance in a silicon-on-insulator body contacted MOSFET'
[patent_app_type] => B2
[patent_app_number] => 09/940297
[patent_app_country] => US
[patent_app_date] => 2001-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/642/06642579.pdf
[firstpage_image] =>[orig_patent_app_number] => 09940297
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/940297 | Method of reducing the extrinsic body resistance in a silicon-on-insulator body contacted MOSFET | Aug 27, 2001 | Issued |
Array
(
[id] => 5874085
[patent_doc_number] => 20020048905
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-25
[patent_title] => 'Chip-type semiconductor device'
[patent_app_type] => new
[patent_app_number] => 09/939457
[patent_app_country] => US
[patent_app_date] => 2001-08-24
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0048/20020048905.pdf
[firstpage_image] =>[orig_patent_app_number] => 09939457
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/939457 | Chip-type semiconductor device | Aug 23, 2001 | Abandoned |
Array
(
[id] => 6690886
[patent_doc_number] => 20030038318
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-27
[patent_title] => 'Vertical transistor with horizontal gate layers'
[patent_app_type] => new
[patent_app_number] => 09/939417
[patent_app_country] => US
[patent_app_date] => 2001-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
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[pdf_file] => publications/A1/0038/20030038318.pdf
[firstpage_image] =>[orig_patent_app_number] => 09939417
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/939417 | Floating gate transistor with horizontal gate layers stacked next to vertical body | Aug 23, 2001 | Issued |
| 09/914067 | Integrated Circuit Device Having a Supporting Member for Improving the Reliability of the Device | Aug 22, 2001 | Abandoned |
| 09/914077 | IC COIL MOUNTED IN AN INFORMATION CARRIER | Aug 22, 2001 | Abandoned |
Array
(
[id] => 1380268
[patent_doc_number] => 06563198
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-05-13
[patent_title] => 'Adhesive pad having EMC shielding characteristics'
[patent_app_type] => B1
[patent_app_number] => 09/932307
[patent_app_country] => US
[patent_app_date] => 2001-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2157
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/563/06563198.pdf
[firstpage_image] =>[orig_patent_app_number] => 09932307
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/932307 | Adhesive pad having EMC shielding characteristics | Aug 16, 2001 | Issued |
Array
(
[id] => 6269332
[patent_doc_number] => 20020104994
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-08
[patent_title] => 'Method of manufacturing thin film transistor'
[patent_app_type] => new
[patent_app_number] => 09/930847
[patent_app_country] => US
[patent_app_date] => 2001-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2027
[patent_no_of_claims] => 20
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[pdf_file] => publications/A1/0104/20020104994.pdf
[firstpage_image] =>[orig_patent_app_number] => 09930847
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/930847 | Method of manufacturing thin film transistor | Aug 13, 2001 | Abandoned |
Array
(
[id] => 1590831
[patent_doc_number] => 06483161
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-11-19
[patent_title] => 'Submount with filter layers for mounting a bottom-incidence type photodiode'
[patent_app_type] => B1
[patent_app_number] => 09/928397
[patent_app_country] => US
[patent_app_date] => 2001-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/06/483/06483161.pdf
[firstpage_image] =>[orig_patent_app_number] => 09928397
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/928397 | Submount with filter layers for mounting a bottom-incidence type photodiode | Aug 13, 2001 | Issued |
Array
(
[id] => 6686328
[patent_doc_number] => 20030030051
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-13
[patent_title] => 'Superjunction device with improved avalanche capability and breakdown voltage'
[patent_app_type] => new
[patent_app_number] => 09/927027
[patent_app_country] => US
[patent_app_date] => 2001-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => publications/A1/0030/20030030051.pdf
[firstpage_image] =>[orig_patent_app_number] => 09927027
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/927027 | Superjunction device with improved avalanche capability and breakdown voltage | Aug 8, 2001 | Abandoned |
Array
(
[id] => 1125254
[patent_doc_number] => 06794716
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-21
[patent_title] => 'SOI MOSFET having body contact for preventing floating body effect and method of fabricating the same'
[patent_app_type] => B2
[patent_app_number] => 09/924787
[patent_app_country] => US
[patent_app_date] => 2001-08-08
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/924787 | SOI MOSFET having body contact for preventing floating body effect and method of fabricating the same | Aug 7, 2001 | Issued |
Array
(
[id] => 1249080
[patent_doc_number] => 06674103
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-01-06
[patent_title] => 'HBT with nitrogen-containing current blocking base collector interface and method for current blocking'
[patent_app_type] => B2
[patent_app_number] => 09/919367
[patent_app_country] => US
[patent_app_date] => 2001-07-31
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/919367 | HBT with nitrogen-containing current blocking base collector interface and method for current blocking | Jul 30, 2001 | Issued |
Array
(
[id] => 5870570
[patent_doc_number] => 20020047140
[patent_country] => US
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[patent_issue_date] => 2002-04-25
[patent_title] => 'Arrangement in a power mosfet'
[patent_app_type] => new
[patent_app_number] => 09/906697
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 09906697
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/906697 | Arrangement in a power mosfet | Jul 17, 2001 | Issued |
Array
(
[id] => 6753416
[patent_doc_number] => 20030001192
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[patent_kind] => A1
[patent_issue_date] => 2003-01-02
[patent_title] => 'Wiring layer structure for ferroelectric capacitor'
[patent_app_type] => new
[patent_app_number] => 09/893487
[patent_app_country] => US
[patent_app_date] => 2001-06-29
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[pdf_file] => publications/A1/0001/20030001192.pdf
[firstpage_image] =>[orig_patent_app_number] => 09893487
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/893487 | Wiring layer structure for ferroelectric capacitor | Jun 28, 2001 | Issued |
Array
(
[id] => 5798453
[patent_doc_number] => 20020008249
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[patent_issue_date] => 2002-01-24
[patent_title] => 'Compound semiconductor device'
[patent_app_type] => new
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/893477 | Compound semiconductor device having a mesfet that raises the maximum mutual conductance and changes the mutual conductance | Jun 28, 2001 | Issued |
Array
(
[id] => 961327
[patent_doc_number] => 06952040
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-10-04
[patent_title] => 'Transistor structure and method of fabrication'
[patent_app_type] => utility
[patent_app_number] => 09/895697
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/895697 | Transistor structure and method of fabrication | Jun 28, 2001 | Issued |
Array
(
[id] => 1132464
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[patent_title] => 'Lateral conduction superjunction semiconductor device'
[patent_app_type] => B2
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[patent_app_country] => US
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Array
(
[id] => 6713834
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[patent_title] => 'Metal article coated with tin or tin alloy under tensile stress to inhibit whisker growth'
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[patent_app_number] => 09/887827
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/887827 | Metal article coated with tin or tin alloy under tensile stress to inhibit whisker growth | Jun 21, 2001 | Abandoned |