Search

Kannan Shanmugasundaram

Examiner (ID: 10064, Phone: (571)270-7763 , Office: P/2158 )

Most Active Art Unit
2158
Art Unit(s)
4152, 2158, 2168
Total Applications
619
Issued Applications
408
Pending Applications
63
Abandoned Applications
166

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18015091 [patent_doc_number] => 11507387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Method to optimize system boot time of modules/driver's execution in UEFI pre-boot environment [patent_app_type] => utility [patent_app_number] => 16/883125 [patent_app_country] => US [patent_app_date] => 2020-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4499 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16883125 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/883125
Method to optimize system boot time of modules/driver's execution in UEFI pre-boot environment May 25, 2020 Issued
Array ( [id] => 17542515 [patent_doc_number] => 11307636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Semiconductor storing apparatus and flash memory operation method [patent_app_type] => utility [patent_app_number] => 16/882772 [patent_app_country] => US [patent_app_date] => 2020-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3698 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882772 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/882772
Semiconductor storing apparatus and flash memory operation method May 25, 2020 Issued
Array ( [id] => 17491978 [patent_doc_number] => 11281280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => Reducing chiplet wakeup latency [patent_app_type] => utility [patent_app_number] => 16/876325 [patent_app_country] => US [patent_app_date] => 2020-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5463 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16876325 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/876325
Reducing chiplet wakeup latency May 17, 2020 Issued
Array ( [id] => 17379606 [patent_doc_number] => 11237620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Hierarchical power management unit for low power and low duty cycle devices [patent_app_type] => utility [patent_app_number] => 16/866416 [patent_app_country] => US [patent_app_date] => 2020-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 12884 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16866416 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/866416
Hierarchical power management unit for low power and low duty cycle devices May 3, 2020 Issued
Array ( [id] => 17172283 [patent_doc_number] => 20210325953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => STOPPING SENSING STATE OF A SENSOR BASED ON POWER DECOUPLING AND DATA DECOUPLING [patent_app_type] => utility [patent_app_number] => 16/849378 [patent_app_country] => US [patent_app_date] => 2020-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16849378 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/849378
Stopping sensing state of a sensor based on power decoupling and data decoupling Apr 14, 2020 Issued
Array ( [id] => 17283072 [patent_doc_number] => 11200101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Managing applications for power conservation [patent_app_type] => utility [patent_app_number] => 16/842973 [patent_app_country] => US [patent_app_date] => 2020-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 13250 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16842973 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/842973
Managing applications for power conservation Apr 7, 2020 Issued
Array ( [id] => 16192971 [patent_doc_number] => 20200233820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => ENHANCING PROCESSING PERFORMANCE OF A DNN MODULE BY BANDWIDTH CONTROL OF FABRIC INTERFACE [patent_app_type] => utility [patent_app_number] => 16/843800 [patent_app_country] => US [patent_app_date] => 2020-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8934 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16843800 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/843800
Enhancing processing performance of a DNN module by bandwidth control of fabric interface Apr 7, 2020 Issued
Array ( [id] => 18310356 [patent_doc_number] => 20230114256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => FEATURE MODIFICATION IN STANDBY MODE BASED ON POWER SOURCE CAPACITY [patent_app_type] => utility [patent_app_number] => 17/905354 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5084 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17905354 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/905354
FEATURE MODIFICATION IN STANDBY MODE BASED ON POWER SOURCE CAPACITY Mar 18, 2020 Abandoned
Array ( [id] => 17454530 [patent_doc_number] => 11269389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => On chip power on reset with integrated supervisory functions for a functional safety system [patent_app_type] => utility [patent_app_number] => 16/814625 [patent_app_country] => US [patent_app_date] => 2020-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 912 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16814625 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/814625
On chip power on reset with integrated supervisory functions for a functional safety system Mar 9, 2020 Issued
Array ( [id] => 17999335 [patent_doc_number] => 11500440 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Transferring network input/output (I/O) device control ownership between heterogeneous computing entities [patent_app_type] => utility [patent_app_number] => 16/813237 [patent_app_country] => US [patent_app_date] => 2020-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5308 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16813237 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/813237
Transferring network input/output (I/O) device control ownership between heterogeneous computing entities Mar 8, 2020 Issued
Array ( [id] => 16094857 [patent_doc_number] => 20200201415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => TECHNIQUES FOR SELF-TUNING OF COMPUTING SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/808862 [patent_app_country] => US [patent_app_date] => 2020-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7297 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16808862 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/808862
Techniques for self-tuning of computing systems Mar 3, 2020 Issued
Array ( [id] => 16094789 [patent_doc_number] => 20200201381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => CLOCK SYNCHRONIZATION [patent_app_type] => utility [patent_app_number] => 16/806808 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18325 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16806808 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/806808
Clock synchronization Mar 1, 2020 Issued
Array ( [id] => 16270734 [patent_doc_number] => 20200272221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => Multi-Interface Transponder Device - Power Management [patent_app_type] => utility [patent_app_number] => 16/800424 [patent_app_country] => US [patent_app_date] => 2020-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20527 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16800424 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/800424
Multi-Interface Transponder Device - Power Management Feb 24, 2020 Abandoned
Array ( [id] => 16454431 [patent_doc_number] => 20200363857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => ELECTRONIC APPARATUS AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 16/777849 [patent_app_country] => US [patent_app_date] => 2020-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12487 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16777849 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/777849
Electronic apparatus and control method Jan 29, 2020 Issued
Array ( [id] => 17106041 [patent_doc_number] => 11126253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Electronic device and circuit substrate [patent_app_type] => utility [patent_app_number] => 16/773706 [patent_app_country] => US [patent_app_date] => 2020-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 16884 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16773706 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/773706
Electronic device and circuit substrate Jan 26, 2020 Issued
Array ( [id] => 16993780 [patent_doc_number] => 20210232200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => TELEMETRY ENABLED POWER MINIMIZATION IN MESH AND EDGE COMPUTING [patent_app_type] => utility [patent_app_number] => 16/750571 [patent_app_country] => US [patent_app_date] => 2020-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16750571 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/750571
Telemetry enabled power minimization in mesh and edge computing Jan 22, 2020 Issued
Array ( [id] => 17269180 [patent_doc_number] => 11194605 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-07 [patent_title] => Synchronizing settings associated with virtual computing environments [patent_app_type] => utility [patent_app_number] => 16/748667 [patent_app_country] => US [patent_app_date] => 2020-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5358 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16748667 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/748667
Synchronizing settings associated with virtual computing environments Jan 20, 2020 Issued
Array ( [id] => 17091343 [patent_doc_number] => 11119529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Workload prediction based CPU frequency scaling [patent_app_type] => utility [patent_app_number] => 16/748486 [patent_app_country] => US [patent_app_date] => 2020-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12476 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16748486 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/748486
Workload prediction based CPU frequency scaling Jan 20, 2020 Issued
Array ( [id] => 16964596 [patent_doc_number] => 20210216095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => Monitoring Delay Across Clock Domains Using Dynamic Phase Shift [patent_app_type] => utility [patent_app_number] => 16/739803 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 332 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16739803 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/739803
Monitoring delay across clock domains using dynamic phase shift Jan 9, 2020 Issued
Array ( [id] => 17136243 [patent_doc_number] => 11137794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Systems and methods for synchronization of multiple processors [patent_app_type] => utility [patent_app_number] => 16/735039 [patent_app_country] => US [patent_app_date] => 2020-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8884 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16735039 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/735039
Systems and methods for synchronization of multiple processors Jan 5, 2020 Issued
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