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Kannan Shanmugasundaram

Examiner (ID: 10064, Phone: (571)270-7763 , Office: P/2158 )

Most Active Art Unit
2158
Art Unit(s)
4152, 2158, 2168
Total Applications
619
Issued Applications
408
Pending Applications
63
Abandoned Applications
166

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16247930 [patent_doc_number] => 10747284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Supplemental power reception by bypassing voltage regulator [patent_app_type] => utility [patent_app_number] => 15/937603 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9938 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15937603 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/937603
Supplemental power reception by bypassing voltage regulator Mar 26, 2018 Issued
Array ( [id] => 13992109 [patent_doc_number] => 20190065212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => TECHNOLOGIES FOR EFFICIENTLY BOOTING SLEDS IN A DISAGGREGATED ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 15/933855 [patent_app_country] => US [patent_app_date] => 2018-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15933855 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/933855
Technologies for efficiently booting sleds in a disaggregated architecture Mar 22, 2018 Issued
Array ( [id] => 15953381 [patent_doc_number] => 10664600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Mechanisms for booting a computing device and programmable circuit [patent_app_type] => utility [patent_app_number] => 15/934760 [patent_app_country] => US [patent_app_date] => 2018-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10964 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15934760 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/934760
Mechanisms for booting a computing device and programmable circuit Mar 22, 2018 Issued
Array ( [id] => 16262982 [patent_doc_number] => 10754414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Very low power microcontroller system [patent_app_type] => utility [patent_app_number] => 15/933153 [patent_app_country] => US [patent_app_date] => 2018-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 30 [patent_no_of_words] => 20572 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15933153 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/933153
Very low power microcontroller system Mar 21, 2018 Issued
Array ( [id] => 15730301 [patent_doc_number] => 10613578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Clock synchronization [patent_app_type] => utility [patent_app_number] => 15/933214 [patent_app_country] => US [patent_app_date] => 2018-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 18280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15933214 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/933214
Clock synchronization Mar 21, 2018 Issued
Array ( [id] => 16698369 [patent_doc_number] => 10948966 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-16 [patent_title] => Systems and methods for optimizing power usage for systems within quality-of-service constraints [patent_app_type] => utility [patent_app_number] => 15/914362 [patent_app_country] => US [patent_app_date] => 2018-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8554 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15914362 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/914362
Systems and methods for optimizing power usage for systems within quality-of-service constraints Mar 6, 2018 Issued
Array ( [id] => 14810785 [patent_doc_number] => 20190272002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-05 [patent_title] => WORKLOAD PREDICTION BASED CPU FREQUENCY SCALING [patent_app_type] => utility [patent_app_number] => 15/909083 [patent_app_country] => US [patent_app_date] => 2018-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12330 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15909083 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/909083
Workload prediction based CPU frequency scaling Feb 28, 2018 Issued
Array ( [id] => 15788321 [patent_doc_number] => 10627883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Onboard monitoring of voltage levels and droop events [patent_app_type] => utility [patent_app_number] => 15/907744 [patent_app_country] => US [patent_app_date] => 2018-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4529 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15907744 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/907744
Onboard monitoring of voltage levels and droop events Feb 27, 2018 Issued
Array ( [id] => 15918917 [patent_doc_number] => 10656696 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-19 [patent_title] => Reducing chiplet wakeup latency [patent_app_type] => utility [patent_app_number] => 15/907719 [patent_app_country] => US [patent_app_date] => 2018-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5428 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15907719 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/907719
Reducing chiplet wakeup latency Feb 27, 2018 Issued
Array ( [id] => 15231037 [patent_doc_number] => 10503239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Electronic device and power management method [patent_app_type] => utility [patent_app_number] => 15/905824 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 10481 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15905824 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/905824
Electronic device and power management method Feb 26, 2018 Issued
Array ( [id] => 12868045 [patent_doc_number] => 20180181190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => SYSTEMS AND METHODS FOR FACILITATING LOW POWER ON A NETWORK-ON-CHIP [patent_app_type] => utility [patent_app_number] => 15/903396 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11498 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903396 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/903396
Systems and methods for facilitating low power on a network-on-chip Feb 22, 2018 Issued
Array ( [id] => 12868051 [patent_doc_number] => 20180181192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => SYSTEMS AND METHODS FOR FACILITATING LOW POWER ON A NETWORK-ON-CHIP [patent_app_type] => utility [patent_app_number] => 15/903462 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11501 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903462 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/903462
Systems and methods for facilitating low power on a network-on-chip Feb 22, 2018 Issued
Array ( [id] => 12868048 [patent_doc_number] => 20180181191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => SYSTEMS AND METHODS FOR FACILITATING LOW POWER ON A NETWORK-ON-CHIP [patent_app_type] => utility [patent_app_number] => 15/903427 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11498 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903427 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/903427
Systems and methods for facilitating low power on a network-on-chip Feb 22, 2018 Issued
Array ( [id] => 14750229 [patent_doc_number] => 20190258288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => Clock Tuning [patent_app_type] => utility [patent_app_number] => 15/901597 [patent_app_country] => US [patent_app_date] => 2018-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15901597 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/901597
Clock tuning Feb 20, 2018 Issued
Array ( [id] => 12844336 [patent_doc_number] => 20180173285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => Dynamic control of power consumption based on memory device activity [patent_app_type] => utility [patent_app_number] => 15/898586 [patent_app_country] => US [patent_app_date] => 2018-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6176 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898586 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/898586
Dynamic control of power consumption based on memory device activity Feb 17, 2018 Issued
Array ( [id] => 12845215 [patent_doc_number] => 20180173578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => MANAGING APPLICATIONS FOR POWER CONSERVATION [patent_app_type] => utility [patent_app_number] => 15/898106 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898106 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/898106
Managing applications for power conservation Feb 14, 2018 Issued
Array ( [id] => 13346689 [patent_doc_number] => 20180224884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 15/881837 [patent_app_country] => US [patent_app_date] => 2018-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15881837 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/881837
INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING METHOD Jan 28, 2018 Abandoned
Array ( [id] => 15472595 [patent_doc_number] => 10552172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Virtual appliance supporting multiple instruction set architectures [patent_app_type] => utility [patent_app_number] => 15/880964 [patent_app_country] => US [patent_app_date] => 2018-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4048 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15880964 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/880964
Virtual appliance supporting multiple instruction set architectures Jan 25, 2018 Issued
Array ( [id] => 14628497 [patent_doc_number] => 20190227616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => Power Budgeting in an Information Handling System [patent_app_type] => utility [patent_app_number] => 15/880058 [patent_app_country] => US [patent_app_date] => 2018-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15880058 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/880058
Power budgeting in an information handling system Jan 24, 2018 Issued
Array ( [id] => 13992105 [patent_doc_number] => 20190065210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => BIOS SWITCHING DEVICE [patent_app_type] => utility [patent_app_number] => 15/870391 [patent_app_country] => US [patent_app_date] => 2018-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2019 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15870391 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/870391
BIOS switching device Jan 11, 2018 Issued
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