Search

Kannan Shanmugasundaram

Examiner (ID: 10064, Phone: (571)270-7763 , Office: P/2158 )

Most Active Art Unit
2158
Art Unit(s)
4152, 2158, 2168
Total Applications
619
Issued Applications
408
Pending Applications
63
Abandoned Applications
166

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10501126 [patent_doc_number] => 09229525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'Adaptive latency tolerance for power management of memory bus interfaces' [patent_app_type] => utility [patent_app_number] => 13/919213 [patent_app_country] => US [patent_app_date] => 2013-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3732 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13919213 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/919213
Adaptive latency tolerance for power management of memory bus interfaces Jun 16, 2013 Issued
Array ( [id] => 9200457 [patent_doc_number] => 20130339772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'METHOD FOR SAVING POWER CONSUMPTION AND AN ELECTRONIC DEVICE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/915750 [patent_app_country] => US [patent_app_date] => 2013-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5314 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13915750 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/915750
Method for saving power consumption and an electronic device thereof Jun 11, 2013 Issued
Array ( [id] => 10157849 [patent_doc_number] => 09189631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Firmware authentication' [patent_app_type] => utility [patent_app_number] => 13/912330 [patent_app_country] => US [patent_app_date] => 2013-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 5650 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13912330 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/912330
Firmware authentication Jun 6, 2013 Issued
Array ( [id] => 10164077 [patent_doc_number] => 09195298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Sleep mode circuit and a method for placing a circuit into sleep mode' [patent_app_type] => utility [patent_app_number] => 13/911087 [patent_app_country] => US [patent_app_date] => 2013-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3612 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13911087 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/911087
Sleep mode circuit and a method for placing a circuit into sleep mode Jun 5, 2013 Issued
Array ( [id] => 9083263 [patent_doc_number] => 20130268793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'Power Management Utilizing Proximity or Link Status Determination' [patent_app_type] => utility [patent_app_number] => 13/909822 [patent_app_country] => US [patent_app_date] => 2013-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5120 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13909822 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/909822
Power Management Utilizing Proximity or Link Status Determination Jun 3, 2013 Abandoned
Array ( [id] => 9472405 [patent_doc_number] => 08726052 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-13 [patent_title] => 'Battery life extending power supply system' [patent_app_type] => utility [patent_app_number] => 13/892927 [patent_app_country] => US [patent_app_date] => 2013-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8492 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13892927 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/892927
Battery life extending power supply system May 12, 2013 Issued
Array ( [id] => 9017400 [patent_doc_number] => 20130232364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'Hardware Automatic Performance State Transitions in System on Processor Sleep and Wake Events' [patent_app_type] => utility [patent_app_number] => 13/863554 [patent_app_country] => US [patent_app_date] => 2013-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7211 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13863554 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/863554
Hardware automatic performance state transitions in system on processor sleep and wake events Apr 15, 2013 Issued
Array ( [id] => 9109948 [patent_doc_number] => 20130283080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'APPARATUS AND METHOD FOR CONTROLLING POWER OF EXTERNAL MEMORY IN MOBILE TERMINAL' [patent_app_type] => utility [patent_app_number] => 13/859009 [patent_app_country] => US [patent_app_date] => 2013-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3233 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859009 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/859009
Apparatus and method for controlling power of external memory in mobile terminal Apr 8, 2013 Issued
Array ( [id] => 10137592 [patent_doc_number] => 09170912 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-27 [patent_title] => 'System and methods for power and energy modeling in computing devices using system call tracing' [patent_app_type] => utility [patent_app_number] => 13/859499 [patent_app_country] => US [patent_app_date] => 2013-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12632 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859499 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/859499
System and methods for power and energy modeling in computing devices using system call tracing Apr 8, 2013 Issued
Array ( [id] => 9787717 [patent_doc_number] => 20140304537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-09 [patent_title] => 'METHOD AND APPARATUS FOR MITIGATING EFFECTS OF MEMORY SCRUB OPERATIONS ON IDLE TIME POWER SAVINGS MODES' [patent_app_type] => utility [patent_app_number] => 13/859101 [patent_app_country] => US [patent_app_date] => 2013-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6059 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859101 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/859101
Method and apparatus for mitigating effects of memory scrub operations on idle time power savings modes Apr 8, 2013 Issued
Array ( [id] => 10124195 [patent_doc_number] => 09158553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'System and method for expediting virtual I/O server (VIOS) boot time in a virtual computing environment' [patent_app_type] => utility [patent_app_number] => 13/859022 [patent_app_country] => US [patent_app_date] => 2013-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5646 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859022 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/859022
System and method for expediting virtual I/O server (VIOS) boot time in a virtual computing environment Apr 8, 2013 Issued
Array ( [id] => 9083216 [patent_doc_number] => 20130268746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'SYSTEM-ON-CHIP AND BOOTING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/858112 [patent_app_country] => US [patent_app_date] => 2013-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4183 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13858112 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/858112
System-on-chip and booting method thereof Apr 7, 2013 Issued
Array ( [id] => 9787674 [patent_doc_number] => 20140304494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-09 [patent_title] => 'METHOD AND APPARATUS FOR CONFIGURING A COMPUTING ENVIRONMENT' [patent_app_type] => utility [patent_app_number] => 13/858675 [patent_app_country] => US [patent_app_date] => 2013-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 15044 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13858675 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/858675
Method and apparatus for configuring a computing environment Apr 7, 2013 Issued
Array ( [id] => 9043949 [patent_doc_number] => 20130246587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'METHODS AND APPARATUS FOR IDENTIFYING THE IMPACT OF CHANGES IN COMPUTER NETWORKS' [patent_app_type] => utility [patent_app_number] => 13/782085 [patent_app_country] => US [patent_app_date] => 2013-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7895 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13782085 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/782085
Methods and apparatus for identifying the impact of changes in computer networks Feb 28, 2013 Issued
Array ( [id] => 8918079 [patent_doc_number] => 20130179704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'Dynamically Allocating A Power Budget Over Multiple Domains Of A Processor' [patent_app_type] => utility [patent_app_number] => 13/780066 [patent_app_country] => US [patent_app_date] => 2013-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13780066 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/780066
Dynamically allocating a power budget over multiple domains of a processor Feb 27, 2013 Issued
Array ( [id] => 9326247 [patent_doc_number] => 08661284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-25 [patent_title] => 'Method and system to improve the operations of a registered memory module' [patent_app_type] => utility [patent_app_number] => 13/741532 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 8192 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741532 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/741532
Method and system to improve the operations of a registered memory module Jan 14, 2013 Issued
Array ( [id] => 10530114 [patent_doc_number] => 09256247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-09 [patent_title] => 'Method and apparatus for communicating time information between time aware devices' [patent_app_type] => utility [patent_app_number] => 13/734753 [patent_app_country] => US [patent_app_date] => 2013-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7743 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13734753 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/734753
Method and apparatus for communicating time information between time aware devices Jan 3, 2013 Issued
Array ( [id] => 10568911 [patent_doc_number] => 09292077 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Methods and apparatus for efficient service layer assistance for modem sleep operations' [patent_app_type] => utility [patent_app_number] => 13/734808 [patent_app_country] => US [patent_app_date] => 2013-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13378 [patent_no_of_claims] => 72 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13734808 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/734808
Methods and apparatus for efficient service layer assistance for modem sleep operations Jan 3, 2013 Issued
Array ( [id] => 9056862 [patent_doc_number] => 20130254576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'MULTIPROCESSOR SYSTEM AND METHOD OF CONTROLLING POWER' [patent_app_type] => utility [patent_app_number] => 13/727866 [patent_app_country] => US [patent_app_date] => 2012-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11098 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13727866 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/727866
Multiprocessor system and method of controlling power Dec 26, 2012 Issued
Array ( [id] => 9986499 [patent_doc_number] => 09032235 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-12 [patent_title] => 'Semiconductor storage device and method for controlling the semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 13/727984 [patent_app_country] => US [patent_app_date] => 2012-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 5325 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13727984 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/727984
Semiconductor storage device and method for controlling the semiconductor storage device Dec 26, 2012 Issued
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