
Kannan Shanmugasundaram
Examiner (ID: 10064, Phone: (571)270-7763 , Office: P/2158 )
| Most Active Art Unit | 2158 |
| Art Unit(s) | 4152, 2158, 2168 |
| Total Applications | 619 |
| Issued Applications | 408 |
| Pending Applications | 63 |
| Abandoned Applications | 166 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20130683
[patent_doc_number] => 12372996
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-29
[patent_title] => Electronic system, corresponding method of operation and electronic device
[patent_app_type] => utility
[patent_app_number] => 18/328342
[patent_app_country] => US
[patent_app_date] => 2023-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1066
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18328342
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/328342 | Electronic system, corresponding method of operation and electronic device | Jun 1, 2023 | Issued |
Array
(
[id] => 20130683
[patent_doc_number] => 12372996
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-29
[patent_title] => Electronic system, corresponding method of operation and electronic device
[patent_app_type] => utility
[patent_app_number] => 18/328342
[patent_app_country] => US
[patent_app_date] => 2023-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1066
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18328342
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/328342 | Electronic system, corresponding method of operation and electronic device | Jun 1, 2023 | Issued |
Array
(
[id] => 19551894
[patent_doc_number] => 12135599
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-11-05
[patent_title] => Dynamic computing environment channel enablement
[patent_app_type] => utility
[patent_app_number] => 18/326378
[patent_app_country] => US
[patent_app_date] => 2023-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 7859
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18326378
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/326378 | Dynamic computing environment channel enablement | May 30, 2023 | Issued |
Array
(
[id] => 19617469
[patent_doc_number] => 20240403149
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-05
[patent_title] => PROCESSOR RESTART USING FIRMWARE BOOT FROM VOLATILE MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/325830
[patent_app_country] => US
[patent_app_date] => 2023-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4671
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18325830
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/325830 | Processor restart using firmware boot from volatile memory | May 29, 2023 | Issued |
Array
(
[id] => 19419793
[patent_doc_number] => 20240295916
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-05
[patent_title] => MEMORY SYSTEM AND OPERATION METHOD THEREOF AND POWER MANAGEMENT MODULE
[patent_app_type] => utility
[patent_app_number] => 18/203596
[patent_app_country] => US
[patent_app_date] => 2023-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13372
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18203596
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/203596 | Memory system and operation method thereof and power management module | May 29, 2023 | Issued |
Array
(
[id] => 18651555
[patent_doc_number] => 20230297391
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-21
[patent_title] => MEMORY, MEMORY CONTROLLING METHOD AND SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/202889
[patent_app_country] => US
[patent_app_date] => 2023-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6263
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18202889
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/202889 | Memory, memory controlling method and system | May 26, 2023 | Issued |
Array
(
[id] => 18651320
[patent_doc_number] => 20230297156
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-21
[patent_title] => LOW POWER STATE STAGING
[patent_app_type] => utility
[patent_app_number] => 18/323945
[patent_app_country] => US
[patent_app_date] => 2023-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8681
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 38
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18323945
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/323945 | Low power state staging | May 24, 2023 | Issued |
Array
(
[id] => 19794756
[patent_doc_number] => 12235702
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-25
[patent_title] => Chip, series power supply circuit, data processing device, and computer server
[patent_app_type] => utility
[patent_app_number] => 18/201749
[patent_app_country] => US
[patent_app_date] => 2023-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3482
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18201749
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/201749 | Chip, series power supply circuit, data processing device, and computer server | May 23, 2023 | Issued |
Array
(
[id] => 19398371
[patent_doc_number] => 12072732
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-27
[patent_title] => Circuit and method to set delay between two periodic signals with unknown phase relationship
[patent_app_type] => utility
[patent_app_number] => 18/320384
[patent_app_country] => US
[patent_app_date] => 2023-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4487
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18320384
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/320384 | Circuit and method to set delay between two periodic signals with unknown phase relationship | May 18, 2023 | Issued |
Array
(
[id] => 19669166
[patent_doc_number] => 12181912
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-31
[patent_title] => Circuit with load jump mitigation
[patent_app_type] => utility
[patent_app_number] => 18/318038
[patent_app_country] => US
[patent_app_date] => 2023-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 5732
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18318038
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/318038 | Circuit with load jump mitigation | May 15, 2023 | Issued |
Array
(
[id] => 19558285
[patent_doc_number] => 20240370077
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => SYSTEM AGNOSTIC AUTONOMOUS SYSTEM STATE MANAGEMENT
[patent_app_type] => utility
[patent_app_number] => 18/312522
[patent_app_country] => US
[patent_app_date] => 2023-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7981
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312522
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/312522 | System agnostic autonomous system state management | May 3, 2023 | Issued |
Array
(
[id] => 18756292
[patent_doc_number] => 20230359740
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => CODE PATCHING FOR SYSTEM ON A CHIP
[patent_app_type] => utility
[patent_app_number] => 18/140373
[patent_app_country] => US
[patent_app_date] => 2023-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9434
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18140373
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/140373 | Code patching for system on a chip | Apr 26, 2023 | Issued |
Array
(
[id] => 18659848
[patent_doc_number] => 20230305855
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-28
[patent_title] => ELECTRONIC DEVICE INCLUDING CONTROLLER FOR SYSTEM BOOTING AND OPERATING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/307518
[patent_app_country] => US
[patent_app_date] => 2023-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13138
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18307518
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/307518 | Electronic device including controller for system booting and operating method thereof | Apr 25, 2023 | Issued |
Array
(
[id] => 19905347
[patent_doc_number] => 12282352
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-22
[patent_title] => Electronic device for performing clock management by using clock counters allocated at different power domains and associated method
[patent_app_type] => utility
[patent_app_number] => 18/139939
[patent_app_country] => US
[patent_app_date] => 2023-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 0
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18139939
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/139939 | Electronic device for performing clock management by using clock counters allocated at different power domains and associated method | Apr 25, 2023 | Issued |
Array
(
[id] => 19092518
[patent_doc_number] => 11953967
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-09
[patent_title] => Power management unit
[patent_app_type] => utility
[patent_app_number] => 18/307508
[patent_app_country] => US
[patent_app_date] => 2023-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 9512
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18307508
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/307508 | Power management unit | Apr 25, 2023 | Issued |
Array
(
[id] => 19493005
[patent_doc_number] => 12111716
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-08
[patent_title] => Device and method for efficient transitioning to and from reduced power state
[patent_app_type] => utility
[patent_app_number] => 18/304849
[patent_app_country] => US
[patent_app_date] => 2023-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 5661
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18304849
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/304849 | Device and method for efficient transitioning to and from reduced power state | Apr 20, 2023 | Issued |
Array
(
[id] => 19841515
[patent_doc_number] => 12253902
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-18
[patent_title] => Power consumption control device applied to electronic device and associated method
[patent_app_type] => utility
[patent_app_number] => 18/134541
[patent_app_country] => US
[patent_app_date] => 2023-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2225
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18134541
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/134541 | Power consumption control device applied to electronic device and associated method | Apr 12, 2023 | Issued |
Array
(
[id] => 19021946
[patent_doc_number] => 20240078117
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-07
[patent_title] => SYSTEM AND METHOD FOR DEVICE INTEROPERABILITY AND SYNCHRONIZATION
[patent_app_type] => utility
[patent_app_number] => 18/132828
[patent_app_country] => US
[patent_app_date] => 2023-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12027
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18132828
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/132828 | System and method for device interoperability and synchronization | Apr 9, 2023 | Issued |
Array
(
[id] => 19036152
[patent_doc_number] => 20240085967
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => INTEGRATED CIRCUIT THAT MITIGATES INDUCTIVE-INDUCED VOLTAGE OVERSHOOT
[patent_app_type] => utility
[patent_app_number] => 18/132394
[patent_app_country] => US
[patent_app_date] => 2023-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20373
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18132394
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/132394 | INTEGRATED CIRCUIT THAT MITIGATES INDUCTIVE-INDUCED VOLTAGE OVERSHOOT | Apr 7, 2023 | Pending |
Array
(
[id] => 19678107
[patent_doc_number] => 12189968
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-01-07
[patent_title] => Recovering mechanical energy from data storage devices
[patent_app_type] => utility
[patent_app_number] => 18/123931
[patent_app_country] => US
[patent_app_date] => 2023-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8259
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18123931
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/123931 | Recovering mechanical energy from data storage devices | Mar 19, 2023 | Issued |